Title:
THIN-FILM TRANSISTOR AND PREPARATION METHOD THEREFOR, ARRAY SUBSTRATE, AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/205528
Kind Code:
A1
Abstract:
A thin-film transistor and preparation method therefor, an array substrate, and a display device. The method comprises: preparing an etch-resistant layer pattern (301) on an active layer (204), wherein a conducting medium is doped in the etch-resistant layer pattern (301); etching the region in the active layer (204) that is not covered by the etch-resistant layer pattern (301) to form an active layer pattern (401), and retaining the etch-resistant layer pattern (301); and preparing a source (901) and a drain (902) of a thin-film transistor. Good electrical contact regions are formed between the source and the active layer and between the drain and the active layer because the conducting medium with low resistivity is doped in the etch-resistant layer pattern.
Inventors:
GONG KUI (CN)
DUAN XIANXUE (CN)
LI JILONG (CN)
DUAN XIANXUE (CN)
LI JILONG (CN)
Application Number:
PCT/CN2017/110441
Publication Date:
November 15, 2018
Filing Date:
November 10, 2017
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
HEFEI BOE OPTOELECTRONICS TECH (CN)
HEFEI BOE OPTOELECTRONICS TECH (CN)
International Classes:
H01L21/336; H01L29/417; H01L29/786
Foreign References:
| CN101826529A | 2010-09-08 | |||
| CN102469691A | 2012-05-23 | |||
| CN105334995A | 2016-02-17 | |||
| JP2002268082A | 2002-09-18 |
Attorney, Agent or Firm:
TDIP & PARTNERS (CN)
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