Title:
THIN FILM TRANSISTOR SUBSTRATE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2015/186349
Kind Code:
A1
Abstract:
Disclosed is a method for manufacturing a TFT substrate (1) that is provided with a thin film transistor having an oxide semiconductor layer (5). The method includes: a step for forming source wiring (150) above a substrate (2), said source wiring being copper wiring formed of a laminated film including a copper film and a cap film on the copper film; a step for film-forming an insulating layer (8) on the source wiring (150); and a step for performing heat treatment at a temperature above 290°C after film-forming the insulating layer (8). The step for film-forming the insulating layer (8) includes: a step for film-forming a first silicon oxide film (81) at a film-forming temperature equal to or below 290°C; and a step for film-forming a second silicon oxide film (82) above the first silicon oxide film (81) at a film-forming temperature equal to or below 290°C. The total film thickness of the first silicon oxide film (81) and the second silicon oxide film (82) is equal to or more than 460 nm.
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Inventors:
SAITOH TOHRU
Application Number:
PCT/JP2015/002777
Publication Date:
December 10, 2015
Filing Date:
June 02, 2015
Export Citation:
Assignee:
JOLED INC (JP)
International Classes:
H01L29/786; G09F9/30; H01L21/28; H01L21/336; H01L51/50; H05B33/02
Foreign References:
| JP2013033927A | 2013-02-14 | |||
| JP2012243779A | 2012-12-10 | |||
| JP2011091364A | 2011-05-06 |
Attorney, Agent or Firm:
YOSHIKAWA, Shuichi et al. (JP)
Shuichi Yoshikawa (JP)
Shuichi Yoshikawa (JP)
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