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Title:
THREE DIMENSIONAL DEVICE INTEGRATION METHOD AND INTEGRATED DEVICE
Document Type and Number:
WIPO Patent Application WO2001026137
Kind Code:
A3
Abstract:
A device integration method and integrated device. The method includes the steps of polishing surfaces of first (10) and second (30) workpieces each to a surface roughness of about 5-10 ANGSTROM . The polished surfaces of the first and second workpieces are bonded together. A surface of a third workpiece (32) is polished to the surface roughness. The surface of the third workpiece is bonded to the joined first and second workpieces. The first, second and third workpieces may each be a semiconductor device having a thin material formed on one surface, preferably in wafer form. The thin materials are polished to the desired surface roughness and then bonded together. The thin materials may each have a thickness of approximately 1-10 times the surface non-planarity of the material on which they are formed. Any number of devices may be bonded together, and the devices may be different types of devices or different technologies.

Inventors:
ENQUIST PAUL M
Application Number:
PCT/US2000/021990
Publication Date:
August 30, 2001
Filing Date:
September 29, 2000
Export Citation:
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Assignee:
RES TRIANGLE INST (US)
International Classes:
H01L21/331; H01L21/02; H01L21/20; H01L21/60; H01L21/768; H01L21/822; H01L21/8234; H01L21/8238; H01L21/98; H01L27/00; H01L27/04; H01L27/088; H01L27/092; H01L29/737; (IPC1-7): H01L21/58
Foreign References:
US5851894A1998-12-22
US5650353A1997-07-22
US5563084A1996-10-08
US5763318A1998-06-09
US5902118A1999-05-11
US6197663B12001-03-06
US5087585A1992-02-11
Other References:
See also references of EP 1245039A4
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