CROSS-REFERENCE TO RELATED APPLICATION

[0001] This international patent application claims the benefit of, and priority to, U.S. Provisional Patent Application Ser. No. 62/969,325, filed February 3, 2020, the disclosure of which is expressly incorporated herein by reference in its entirety.

GOVERNMENT RIGHTS

[0002] This invention was made with government support under GM1311100 awarded by the National Institutes of Health. The United States Government has certain rights in the invention.

TECHNICAL FIELD

[0003] The present disclosure relates generally to charge detection mass spectrometry instruments, and more specifically to performing mass and charge measurements with such instruments.

BACKGROUND

[0004] Charge detection mass spectrometry (CD MS) is a particle analysis technique in which the mass of an ion is determined by simultaneously measuring its mass-to-charge ratio, typically referred to as “m/z,” and charge. In some CDMS instruments, an electrostatic linear ion trap (ELIT) is used to conduct such measurements.

SUMMARY

[0005] The present disclosure may comprise one or more of the features recited in the attached claims, and/or one or more of the following features and combinations thereof. In one aspect, a charge detection mass spectrometer (CDMS) may comprise an electrostatic linear ion trap (ELIT), a source of ions configured to supply ions to the ELIT, a charge sensitive preamplifier having an input operatively coupled to the ELIT, at least one processor operatively coupled to the ELIT and to an output of the amplifier, and at least one memory having instructions stored therein which, when executed by the at least one processor, cause the at least one processor to (a) control the ELIT to trap therein an ion supplied by the ion source, (b) collect ion measurement information based on output signals produced by the charge sensitive preamplifier as the trapped ion oscillates back and forth through the ELIT, the ion measurement information including charge induced by the ion on a charge detector of the ELIT during each pass of the ion through the ELIT and timing of the induced charges relative to one another, (c) process the ion measurement information in the time- domain for each of a plurality of sequential time windows of the ion measurement information to determine a charge magnitude of the ion during each time window, and (d) determine the magnitude of charge of the trapped ion based on the charge magnitudes of each of the time windows

[0006] In another aspect, a method is provided for measuring a charge of an ion in an electrostatic linear ion trap including a charge detection cylinder positioned between two ion mirrors, in which during an ion trapping event the ion repeatedly oscillates back and forth between the two ion mirrors each time passing through and inducing a corresponding charge on the charge detection cylinder and in which an ion measurement signal including magnitudes of the induced charges and timing of the induced charges during the trapping event are recorded in an ion measurement file. The method may comprise (a) establishing a time window of the ion measurement signal at the beginning of the ion measurement file, (b) generating a simulated ion measurement signal for the time window of the ion measurement signal using input parameters including estimates of signal frequency, charge magnitude, signal phase and duty cycle, (c) iteratively processing a variance between the time window of the ion measurement signal and the simulated ion measurement signal by adjusting values of the input parameters until the variance reaches convergence, (d) recording a charge magnitude value resulting from (c), (e) advancing the time window of the ion measurement signal by an incremental time amount, (f) repeating (b) - (d) until the time window reaches the end of the ion measurement file, and (g) determining the charge of the ion based on the charge magnitude values of each of the time windows.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] FIG. 1 is a simplified diagram of a CDMS system including an embodiment of an electrostatic linear ion trap (ELIT) with control and measurement components coupled thereto. [0008] FIG. 2A is a magnified view of the ion mirror M1 of the ELIT illustrated in FIG. 1 in which the mirror electrodes of M1 are controlled to produce an ion transmission electric field therein.

[0009] FIG. 2B is a magnified view of the ion mirror M2 of the ELIT illustrated in FIG. 1 in which the mirror electrodes of M2 are controlled to produce an ion reflection electric field therein.

[0010] FIG. 3 is a simplified diagram of an embodiment of the processor illustrated in FIG. 1.

[0011] FIGS. 4A - 4C are simplified diagrams of the ELIT of FIG. 1 demonstrating sequential control and operation of the ion mirrors to capture at least one ion within the ELIT and to cause the ion(s) to oscillate back and forth between the ion mirrors and through the charge detection cylinder to measure and record multiple charge detection events.

[0012] FIG. 5 is a simplified flow diagram depicting an embodiment of a process for analyzing the signal measurements contained in an ion measurement event file in the time domain to determine the frequency and the charge magnitude (z) of the ion oscillating back and forth through the charge detection cylinder of the ELIT during an ion trapping event.

[0013] FIG. 6 is a plot of signal vs. time depicting one period of a simulated signal for an axial ion trajectory in an electrostatic linear ion trap.

[0014] FIG. 7 is an expanded plot of the simulated signal of FIG. 6 in which the duty cycle is varied between 40% and 60%.

[0015] FIG. 8 is another expanded plot of the simulated signal of FIG. 6 in which the frequency is varied between 10 kHz and 15 kHz.

[0016] FIG. 9 is an expanded plot of the simulated signal of FIG. 6 shown with a modified variation superimposed thereon, wherein the modified variation introduces RC decay.

[0017] FIG. 10 is a simplified work flow diagram illustrating an embodiment of a cross-correlation process for determining an initial estimate of the phase of the simulated ion signal.

[0018] FIG. 11 is a simplified work flow diagram illustrating an embodiment of an optimization algorithm for reducing variance between a simulated ion signal and an ion measurement signal. [0019] FIG. 12 is plot of SRS vs. iteration number illustrating an example convergence according to the optimization algorithm of FIG. 11 .

DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS

[0020] For the purposes of promoting an understanding of the principles of this disclosure, reference will now be made to a number of illustrative embodiments shown in the attached drawings and specific language will be used to describe the same. [0021] This disclosure relates to apparatuses and techniques for processing time-domain ion measurement signals, produced by an electrostatic linear ion trap (ELIT) of a charge detection mass spectrometer (CDMS), to simultaneously determine ion mass-to-charge ratio and ion charge from which ion mass can then be determined. For purposes of this disclosure, the phrase “charge detection event” is defined as detection of a charge induced on a charge detector of the ELIT by an ion passing a single time through the charge detector, and the phrase “ion measurement event” is defined as a collection of charge detection events resulting from oscillation of an ion back and forth through the charge detector a selected number of times or for a selected time period. As the oscillation of an ion back and forth through the charge detector results from controlled trapping of the ion within the ELIT, as will be described in detail below, the phrase “ion measurement event” may alternatively be referred to herein as an “ion trapping event” or simply as a “trapping event,” and the phrases “ion measurement event,” “ion trapping event”, “trapping event” and variants thereof shall be understood to be synonymous with one another.

[0022] Referring to FIG. 1 , a CDMS system 10 is shown including an embodiment of an electrostatic linear ion trap (ELIT) 14 with control and measurement components coupled thereto. In the illustrated embodiment, the CDMS system 10 includes an ion source 12 operatively coupled to an inlet of the ELIT 14. The ion source 12 illustratively includes any conventional device or apparatus for generating ions from a sample and may further include one or more devices and/or instruments for separating, collecting, filtering, fragmenting and/or normalizing or shifting charge states of ions according to one or more molecular characteristics. As one illustrative example, which should not be considered to be limiting in any way, the ion source 12 may include a conventional electrospray ionization source, a matrix-assisted laser desorption ionization (MALDI) source or the like, coupled to an inlet of a conventional mass spectrometer. The mass spectrometer may be of any conventional design including, for example, but not limited to a time-of-flight (TOF) mass spectrometer, a reflectron mass spectrometer, a Fourier transform ion cyclotron resonance (FTICR) mass spectrometer, a quadrupole mass spectrometer, a triple quadrupole mass spectrometer, a magnetic sector mass spectrometer, or the like. In any case, the ion outlet of the mass spectrometer is operatively coupled to an ion inlet of the ELIT 14. The sample from which the ions are generated may be any biological or other material. [0023] In the illustrated embodiment, the ELIT 14 illustratively includes a charge detector CD surrounded by a ground chamber or cylinder GC and operatively coupled to opposing ion mirrors M1 , M2 respectively positioned at opposite ends thereof. The ion mirror M1 is operatively positioned between the ion source 12 and one end of the charge detector CD, and ion mirror M2 is operatively positioned at the opposite end of the charge detector CD. Each ion mirror M1 , M2 defines a respective ion mirror region R1 , R2 therein. The regions R1 , R2 of the ion mirrors M1 , M2, the charge detector CD, and the spaces between the charge detector CD and the ion mirrors M1 , M2 together define a longitudinal axis 20 centrally therethrough which illustratively represents an ideal ion travel path through the ELIT 14 and between the ion mirrors M1 , M2 as will be described in greater detail below.

[0024] In the illustrated embodiment, voltage sources V1 , V2 are electrically connected to the ion mirrors M1 , M2 respectively. Each voltage source V1 , V2 illustratively includes one or more switchable DC voltage sources which may be controlled or programmed to selectively produce a number, N, programmable or controllable voltages, wherein N may be any positive integer. Illustrative examples of such voltages will be described below with respect to FIGS. 2A and 2B to establish one of two different operating modes of each of the ion mirrors M1 , M2 as will be described in detail below. In any case, ions move within the ELIT 14 close to the longitudinal axis 20 extending centrally through the charge detector CD and the ion mirrors M1 , M2 under the influence of electric fields selectively established by the voltage sources V1 , V2.

[0025] The voltage sources V1 , V2 are illustratively shown electrically connected by a number, P, of signal paths to a conventional processor 16 including a memory 18 having instructions stored therein which, when executed by the processor 16, cause the processor 16 to control the voltage sources V1 , V2 to produce desired DC output voltages for selectively establishing ion transmission and ion reflection electric fields, TEF, REF respectively, within the regions R1 , R2 of the respective ion mirrors M1 , M2. P may be any positive integer. In some alternate embodiments, either or both of the voltage sources V1 , V2 may be programmable to selectively produce one or more constant output voltages. In other alternative embodiments, either or both of the voltage sources V1 , V2 may be configured to produce one or more time-varying output voltages of any desired shape. It will be understood that more or fewer voltage sources may be electrically connected to the mirrors M1 , M2 in alternate embodiments. [0026] The charge detector CD is illustratively provided in the form of an electrically conductive cylinder which is electrically connected to a signal input of a charge sensitive preamplifier CP, and the signal output of the charge-sensitive preamplifier CP is electrically connected to the processor 16. The voltage sources V1 , V2 are illustratively controlled in a manner, as described in detail below, which selectively traps an ion entering the ELIT 14 and causes it to oscillate therein back and forth between the ion mirrors M1 , M2 such that the trapped ion repeatedly passes through the charge detector CD. With an ion trapped within the ELIT 14 and oscillating back and forth between the ion mirrors M1 , M2, the charge sensitive preamplifier CP is illustratively operable in a conventional manner to detect charges (CH) induced on the charge detection cylinder CD as the ion passes through the charge detection cylinder CD between the ion mirrors M1 , M2, to produce charge detection signals (CHD) corresponding thereto. The charge detection signals CHD are illustratively recorded in the form of oscillation period values and, in this regard, each oscillation period value represents ion measurement information for a single, respective charge detection event. A plurality of such oscillation period values are measured and recorded for the trapped ion during a respective ion measurement event (i.e., during an ion trapping event), and the resulting plurality of recorded oscillation period values i.e., the collection of recorded ion measurement information, for the ion measurement event, is processed to determine ion charge, mass-to-charge ratio and/or mass values as will be described below. Multiple ion measurement events can be processed in this manner, and a mass-to-charge ratio and/or mass spectrum of the sample may illustratively be constructed therefrom.

[0027] Referring now to FIGS. 2A and 2B, embodiments are shown of the ion mirrors M1 , M2 respectively of the ELIT 14 depicted in FIG. 1 . Illustratively, the ion mirrors M1 , M2 are identical to one another in that each includes a cascaded arrangement of 4 spaced-apart, electrically conductive mirror electrodes. For each of the ion mirrors M1 , M2, a first mirror electrode 30i has a thickness W1 and defines a passageway centrally therethrough of diameter P1. An endcap 32 is affixed or otherwise coupled to an outer surface of the first mirror electrode 30i and defines an aperture A1 centrally therethrough which serves as an ion entrance and/or exit to and/or from the corresponding ion mirror M1 , M2 respectively. In the case of the ion mirror M1 , the endcap 32 is coupled to, or is part of, an ion exit of the ion source 12 illustrated in FIG. 1. The aperture A1 for each endcap 32 illustratively has a diameter P2.

[0028] A second mirror electrode 302 of each ion mirror M1 , M2 is spaced apart from the first mirror electrode 30i by a space having width W2. The second mirror electrode 30 ₂ , like the mirror electrode 30i, has thickness W1 and defines a passageway centrally therethrough of diameter P2. A third mirror electrode 30 ₃ of each ion mirror M1 , M2 is likewise spaced apart from the second mirror electrode 302 by a space of width W2. The third mirror electrode 303 has thickness W1 and defines a passageway centrally therethrough of width P1 .

[0029] A fourth mirror electrode 30 ₄ is spaced apart from the third mirror electrode 3O3 by a space of width W2. The fourth mirror electrode 30 ₄ illustratively has a thickness of W1 and is formed by a respective end of the ground cylinder, GC disposed about the charge detector CD. The fourth mirror electrode 30 ₄ defines an aperture A2 centrally therethrough which is illustratively conical in shape and increases linearly between the internal and external faces of the ground cylinder GC from a diameter P3 defined at the internal face of the ground cylinder GC to the diameter P1 at the external face of the ground cylinder GC (which is also the internal face of the respective ion mirror M1 , M2).

[0030] The spaces defined between the mirror electrodes 30i - 30 ₄ may be voids in some embodiments, i.e., vacuum gaps, and in other embodiments such spaces may be filled with one or more electrically non-conductive, e.g., dielectric, materials. The mirror electrodes 30i - 304 and the endcaps 32 are axially aligned, i.e., collinear, such that a longitudinal axis 22 passes centrally through each aligned passageway and also centrally through the apertures A1 , A2. In embodiments in which the spaces between the mirror electrodes 30i - 30 ₄ include one or more electrically non-conductive materials, such materials will likewise define respective passageways therethrough which are axially aligned, i.e., collinear, with the passageways defined through the mirror electrodes 30i - 30 ₄ and which illustratively have diameters of P2 or greater. Illustratively, P1 > P3 > P2, although in other embodiments other relative diameter arrangements are possible.

[0031] A region R1 is defined between the apertures A1 , A2 of the ion mirror M1 , and another region R2 is likewise defined between the apertures A1 , A2 of the ion mirror M2. The regions R1 , R2 are illustratively identical to one another in shape and in volume.

[0032] As described above, the charge detector CD is illustratively provided in the form of an elongated, electrically conductive cylinder positioned and spaced apart between corresponding ones of the ion mirrors M1 , M2 by a space of width W3. In one embodiment, W1 > W3 > W2, and P1 > P3 > P2, although in alternate embodiments other relative width arrangements are possible. In any case, the longitudinal axis 20 illustratively extends centrally through the passageway defined through the charge detection cylinder CD, such that the longitudinal axis 20 extends centrally through the combination of the ion mirrors M1 , M2 and the charge detection cylinder CD. In operation, the ground cylinder GC is illustratively controlled to ground potential such that the fourth mirror electrode 30 ₄ of each ion mirror M1 , M2 is at ground potential at all times. In some alternate embodiments, the fourth mirror electrode 30 ₄ of either or both of the ion mirrors M1 , M2 may be set to any desired DC reference potential, or to a switchable DC or other time-varying voltage source.

[0033] In the embodiment illustrated in FIGS. 2A and 2B, the voltage sources V1 , V 2 are each configured to each produce four DC voltages D1 - D4, and to supply the voltages D1 - D4 to a respective one of the mirror electrodes 30i - 30 ₄ of the respective ion mirror M1 , M2. In some embodiments in which one or more of the mirror electrodes 30i - 30 ₄ is to be held at ground potential at all times, the one or more such mirror electrodes 30i - 30 ₄ may alternatively be electrically connected to the ground reference of the respective voltage supply V1 , V2 and the corresponding one or more voltage outputs D1 - D4 may be omitted. Alternatively or additionally, in embodiments in which any two or more of the mirror electrodes 30i - 30 ₄ are to be controlled to the same non-zero DC values, any such two or more mirror electrodes 30i - 304 may be electrically connected to a single one of the voltage outputs D1 - D4 and superfluous ones of the output voltages D1 - D4 may be omitted.

[0034] Each ion mirror M1 , M2 is illustratively controllable and switchable, by selective application of the voltages D1 - D4, between an ion transmission mode (FIG. 2A) in which the voltages D1 - D4 produced by the respective voltage source V1 , V2 establishes an ion transmission electric field (TEF) in the respective region R1 , R2 thereof, and an ion reflection mode (FIG. 2B) in which the voltages D1 - D4 produced by the respect voltage source V1 , V2 establishes an ion reflection electric field (REF) in the respective region R1 , R2 thereof. As illustrated by example in FIG. 2A, once an ion from the ion source 12 flies into the region R1 of the ion mirror M1 through the inlet aperture A1 of the ion mirror M1 , the ion is focused toward the longitudinal axis 20 of the ELIT 14 by an ion transmission electric field TEF established in the region R1 of the ion mirror M1 via selective control of the voltages D1 - D4 of V1 . As a result of the focusing effect of the transmission electric field TEF in the region R1 of the ion mirror M1 , the ion exiting the region R1 of the ion mirror M1 through the aperture A2 of the ground chamber GC attains a narrow trajectory into and through the charge detector CD, i.e., so as to maintain a path of ion travel through the charge detector CD that is close to the longitudinal axis 20. An identical ion transmission electric field TEF may be selectively established within the region R2 of the ion mirror M2 via like control of the voltages D1 - D4 of the voltage source M2. In the ion transmission mode, an ion entering the region R2 from the charge detection cylinder CD via the aperture A2 of M2 is focused toward the longitudinal axis 20 by the ion transmission electric field TEF within the region R2 so that the ion exits the aperture A1 of the ion mirror M2.

[0035] As illustrated by example in FIG. 2B, an ion reflection electric field REF established in the region R2 of the ion mirror M2 via selective control of the voltages D1 - D4 of V2 acts to decelerate and stop an ion entering the ion region R2 from the charge detection cylinder CD via the ion inlet aperture A2 of M2, to accelerate the stopped ion in the opposite direction back through the aperture A2 of M2 and into the end of the charge detection cylinder CD adjacent to M2 as depicted by the ion trajectory 42, and to focus the ion toward the central, longitudinal axis 20 within the region R2 of the ion mirror M2 so as to maintain a narrow trajectory of the ion back through the charge detector CD toward the ion mirror M1 . An identical ion reflection electric field REF may be selectively established within the region R1 of the ion mirror MI via like control of the voltages D1 - D4 of the voltage source V1 . In the ion reflection mode, an ion entering the region R1 from the charge detection cylinder CD via the aperture A2 of M1 is decelerated and stopped by the ion reflection electric field REF established within the region R1 , then accelerated in the opposite direction back through the aperture A2 of M1 and into the end of the charge detection cylinder CD adjacent to M1 , and focused toward the central, longitudinal axis 20 within the region R1 of the ion mirror M1 so as to maintain a narrow trajectory of the ion back through the charge detector CD toward the ion mirror M1 . An ion that traverses the length of the ELIT 14 and is reflected by the ion reflection electric field REF in the ion regions R1 , R2 in a manner that enables the ion to continue traveling back and forth through the charge detection cylinder CD between the ion mirrors M1 , M2 as just described is considered to be trapped within the ELIT 14.

[0036] Example sets of output voltages D1 - D4 produced by the voltage sources V1 , V2 respectively to control a respective ion mirrors M1 , M2 to the ion transmission and reflection modes described above are shown in TABLE I below. It will be understood that the following values of D1 - D4 are provided only by way of example, and that other values of one or more of D1 - D4 may alternatively be used.

TABLE I

[0037] While the ion mirrors M1 , M2 and the charge detection cylinder CD are illustrated in FIGS. 1 - 2B as defining cylindrical passageways therethrough, it will be understood that in alternate embodiments either or both of the ion mirrors M1 , M2 and/or the charge detection cylinder CD may define non-cylindrical passageways therethrough such that one or more of the passageway(s) through which the longitudinal axis 20 centrally passes represents a cross-sectional area and profile that is not circular. In still other embodiments, regardless of the shape of the cross- sectional profiles, the cross-sectional areas of the passageway defined through the ion mirror M1 may be different from the passageway defined through the ion mirror M2. [0038] Referring now to FIG. 3, an embodiment is shown of the processor 16 illustrated in FIG. 1. In the illustrated embodiment, the processor 16 includes a conventional amplifier circuit 40 having an input receiving the charge detection signal CHD produced by the charge sensitive preamplifier CP and an output electrically connected to an input of a conventional Analog-to-Digital (A/D) converter 42. An output of the A/D converter 42 is electrically connected to a processor 50 (P1 ). The amplifier 40 is operable in a conventional manner to amplify the charge detection signal CHD produced by the charge sensitive preamplifier CP, and the A/D converter is, in turn, operable in a conventional manner to convert the amplified charge detection signal to a digital charge detection signal CDS.

[0039] The processor 16 illustrated in FIG. 3 further includes a conventional comparator 44 having a first input receiving the charge detection signal CHD produced by the charge sensitive preamplifier CP, a second input receiving a threshold voltage CTH produced by a threshold voltage generator (TG) 46 and an output electrically connected to the processor 50. The comparator 44 is operable in a conventional manner to produce a trigger signal TR at the output thereof which is dependent upon the magnitude of the charge detection signal CDH relative to the magnitude of the threshold voltage CTH. In one embodiment, for example, the comparator 44 is operable to produce an “inactive” trigger signal TR at or near a reference voltage, e.g., ground potential, as long as CHD is less than CTH, and is operable to produce an “active” TR signal at or near a supply voltage of the circuitry 40, 42, 44, 46, 50 or otherwise distinguishable from the inactive TR signal when CHD is at or exceeds CTH. In alternate embodiments, the comparator 44 may be operable to produce an “inactive” trigger signal TR at or near the supply voltage as long as CHD is less than CTH, and is operable to produce an “active” trigger signal TR at or near the reference potential when CHD is at or exceeds CTH. Those skilled in the art will recognize other differing trigger signal magnitudes and/or differing trigger signal polarities that may be used to establish the “inactive” and “active” states of the trigger signal TR so long as such differing trigger signal magnitudes and/or different trigger signal polarities are distinguishable by the processor 50, and it will be understood that any such other different trigger signal magnitudes and/or differing trigger signal polarities are intended to fall within the scope of this disclosure. In any case, the comparator 44 may additionally be designed in a conventional manner to include a desired amount of hysteresis to prevent rapid switching of the output between the reference and supply voltages.

[0040] The processor 50 is illustratively operable to produce a threshold voltage control signal THC and to supply THC to the threshold generator 46 to control operation thereof. In some embodiments, the processor 50 is programmed or programmable to control production of the threshold voltage control signal THC in a manner which controls the threshold voltage generator 46 to produce CTH with a desired magnitude and/or polarity. In other embodiments, a user may provide the processor 50 with instructions in real time, e.g., through a downstream processor, e.g., via a virtual control and visualization unit, to control production of the threshold voltage control signal THC in a manner which controls the threshold voltage generator 46 to produce CTH with a desired magnitude and/or polarity. In either case, the threshold voltage generator 46 is illustratively implemented, in some embodiments, in the form of a conventional controllable DC voltage source configured to be responsive to a digital form of the threshold control signal THC, e.g., in the form of a single serial digital signal or multiple parallel digital signals, to produce an analog threshold voltage CTH having a polarity and a magnitude defined by the digital threshold control signal THC. In some alternate embodiments, the threshold voltage generator 46 may be provided in the form of a conventional digital-to-analog (D/A) converter responsive to a serial or parallel digital threshold voltage TCH to produce an analog threshold voltage CTH having a magnitude, and in some embodiments a polarity, defined by the digital threshold control signals THC. In some such embodiments, the D/A converter may form part of the processor 50. Those skilled in the art will recognize other conventional circuits and techniques for selectively producing the threshold voltage CTH of desired magnitude and/or polarity in response to one or more digital and/or analog forms of the control signal THC, and it will be understood that any such other conventional circuits and/or techniques are intended to fall within the scope of this disclosure.

[0041] In addition to the foregoing functions performed by the processor 50, the processor 50 is further operable to control the voltage sources V1 , V2 as described above with respect to FIGS. 2A, 2B to selectively establish ion transmission and reflection fields within the regions R1 , R2 of the ion mirrors M1 , M2 respectively. In some embodiments, the processor 50 is programmed or programmable to control the voltage sources V1 , V2. In other embodiments, the voltage source(s) V1 and/or V 2 may be programmed or otherwise controlled in real time by a user, e.g., through a downstream processor 52, e.g., via a virtual control and visualization unit. In either case, the processor 50 is, in one embodiment, illustratively provided in the form of a field programmable gate array (FPGA) programmed or otherwise instructed by a user to collect and store charge detection signals CDS for charge detection events and for ion measurement events, to produce the threshold control signal(s) TCH from which the magnitude and/or polarity of the threshold voltage CTH is determined or derived, and to control the voltage sources V1 , M2. In this embodiment, the memory 18 described with respect to FIG. 1 is integrated into, and forms part of, the programming of the FPGA. In alternate embodiments, the processor 50 may be provided in the form of one or more conventional microprocessors or controllers and one or more accompanying memory units having instructions stored therein which, when executed by the one or more microprocessors or controllers, cause the one or more microprocessors or controllers to operate as just described. In other alternate embodiments, the processing circuit 50 may be implemented purely in the form of one or more conventional hardware circuits designed to operate as described above, or as a combination of one or more such hardware circuits and at least one microprocessor or controller operable to execute instructions stored in memory to operate as described above.

[0042] The embodiment of the processor 16 depicted in FIG. 3 further illustratively includes a second processor 52 coupled to the first processor 50 and also to at least one memory unit 54. In some embodiments, the processor 52 may include one or more peripheral devices, such as a display monitor, one or more input and/or output devices or the like, although in other embodiments the processor 52 may not include any such peripheral devices. In any case, the processor 52 is illustratively configured, i.e., programmed, to execute at least one process for analyzing ion measurement events. Data in the form of charge magnitude and charge timing data (i.e., detection of the timing of charges induced by the ion on the charge detection cylinder relative to one another) received by the processor 50 via the charge detection signals CDS is illustratively transferred from the processor 50 directly to the processor 52 for processing and analysis upon completion of each ion measurement event.

[0043] In some embodiments, the processor 52 is illustratively provided in the form of a high-speed server operable to perform both collection/storage and analysis of such data. In such embodiments, one or more high-speed memory units 54 may be coupled to the processor 52, and is/are operable to store data received and analyzed by the processor 52. In one embodiment, the one or more memory units 54 illustratively include at least one local memory unit for storing data being used or to be used by the processor 52, and at least one permanent storage memory unit for storing data long term. In one such embodiment, the processor 52 is illustratively provided in the form of a Linux® server (e.g., OpenSuse Leap 42.1) with four Intel® Xeon™ processors (e.g., E5-465L v2, 12 core, 2.4 GHz). In this embodiment, an improvement in the average analysis time of a single ion measurement event file of over 10Ox is realized as compared with a conventional Windows® PC (e.g., i5-2500K, 4 cores, 3.3 GHz). Likewise, the processor 52 of this embodiment together with high speed/high performance memory unit(s) 54 illustratively provide for an improvement of over 100x in data storage speed. Those skilled in the art will recognize one or more other high speed data processing and analysis systems that may be implemented as the processor 52, and it will be understood that any such one or more other high-speed data processing and analysis systems are intended to fall within the scope of this disclosure. In alternate embodiments, the processor 52 may be provided in the form of one or more conventional microprocessors or controllers and one or more accompanying memory units having instructions stored therein which, when executed by the one or more microprocessors or controllers, cause the one or more microprocessors or controllers to operate as described herein.

[0044] In the illustrated embodiment, the memory unit 54 illustratively has instructions stored therein which are executable by the processor 52 to analyze ion measurement event data produced by the ELIT 14 to determine ion mass spectral information for a sample under analysis. In one embodiment, the processor 52 is operable to receive ion measurement event data from the processor 50 in the form of charge magnitude and charge detection timing information measured during each of multiple “charge detection events” (as this term is defined above) making up the “ion measurement event” (as this term is defined above), and to process such charge detection events making up such an ion measurement event to determine ion charge and mass-to-charge data, and to then determine ion mass data therefrom. Multiple ion measurement events may be processed in like manner to create mass spectral information for the sample under analysis.

[0045] As briefly described above with respect to FIGS. 2A and 2B, the voltage sources V1 , V2 are illustratively controlled by the processor 50, e.g., via the processor 52, in a manner which selectively establishes ion transmission and ion reflection electric fields in the region R1 of the ion mirror M1 and in the region R2 of the ion mirror M2 to guide ions introduced into the ELIT 14 from the ion source 12 through the ELIT 14, and to then cause a single ion to be selectively trapped and confined within the ELIT 14 such that the trapped ion repeatedly passes through the charge detector CD as it oscillates back and forth between M1 and M2. Referring to FIGS. 4A - 4C, simplified diagrams of the ELIT 14 of FIG. 1 are shown depicting an example of such sequential control and operation of the ion mirrors M1 , M2 of the ELIT 14. In the following example, the processor 52 will be described as controlling the operation of the voltage sources V1 , V2 in accordance with its programming, although it will be understood that the operation of the voltage source V1 and/or the operation of the voltage source V 2 may be virtually controlled, at least in part, by the processor 50. [0046] As illustrated in FIG. 4A, the ELIT control sequence begins with the processor 52 controlling the voltage source V1 to control the ion mirror M1 to the ion transmission mode of operation (T) by establishing an ion transmission field within the region R1 of the ion mirror M1 , and also controlling the voltage source V 2 to control the ion mirror M2 to the ion transmission mode of operation (T) by likewise establishing an ion transmission field within the region R2 of the ion mirror M2. As a result, ions generated by the ion source 12 pass into the ion mirror M1 and are focused by the ion transmission field established in the region R1 toward the longitudinal axis 20 as they pass into the charge detection cylinder CD. The ions then pass through the charge detection cylinder CD and into the ion mirror M2 where the ion transmission field established within the region R2 of M2 focusses the ions toward the longitudinal axis 20 such that the ions pass through the exit aperture A1 of M2 as illustrated by the ion trajectory 60 depicted in FIG. 4A.

[0047] Referring now to FIG. 4B, after both of the ion mirrors M1 , M2 have been operating in ion transmission operating mode for a selected time period and/or until successful ion transmission therethrough has been achieved, the processor 52 is illustratively operable to control the voltage source V 2 to control the ion mirror M2 to the ion reflection mode (R) of operation by establishing an ion reflection field within the region R2 of the ion mirror M2, while maintaining the ion mirror M1 in the ion transmission mode (T) of operation as shown. As a result, at least one ion generated by the ion source 12 enters into the ion mirror M1 and is focused by the ion transmission field established in the region R1 toward the longitudinal axis 20 such that the at least one ion passes through the ion mirror M1 and into the charge detection cylinder CD as just described with respect to FIG. 4A. The ion(s) then pass(es) through the charge detection cylinder CD and into the ion mirror M2 where the ion reflection field established within the region R2 of M2 reflects the ion(s) to cause it/them to travel in the opposite direction and back into the charge detection cylinder CD, as illustrated by the ion trajectory 62 in FIG. 4B.

[0048] Referring now to FIG. 4C, after the ion reflection electric field has been established in the region R2 of the ion mirror M2, the processor 52 is operable to control the voltage source V1 to control the ion mirror M1 to the ion reflection mode (R) of operation by establishing an ion reflection field within the region R1 of the ion mirror M1 , while maintaining the ion mirror M2 in the ion reflection mode (R) of operation in order to trap the ion(s) within the ELIT 14. In some embodiments, the processor 52 is illustratively operable, i.e., programmed, to control the ELIT 14 in a “random trapping mode” or “continuous trapping mode” in which the processor 52 is operable to control the ion mirror M1 to the reflection mode (R) of operation after the ELIT 14 has been operating in the state illustrated in FIG. 4B, i.e., with M1 in ion transmission mode and M2 in ion reflection mode, for a selected time period. Until the selected time period has elapsed, the ELIT 14 is controlled to operate in the state illustrated in FIG. 4B. In other embodiments, the processor 52 is operable, i.e., programmed, to control the ELIT 14 in a “trigger trapping mode” which illustratively carries a substantially greater probability of trapping a single ion therein as compared to the random trapping mode.

In the “trigger trapping mode,” the processor 52 is operable to control the ion mirror M1 to the reflection mode (R) of operation after an ion has been detected as passing through the charge detection cylinder CD.

[0049] In any case, with both of the ion mirrors M1 , M2 controlled to the ion reflection operating mode (R) to trap an ion within the ELIT 14, the ion is caused by the opposing ion reflection fields established in the regions R1 and R2 of the ion mirrors M1 and M2 respectively to oscillate back and forth between the ion mirrors M1 and M2, each time passing through the charge detection cylinder CD as illustrated by the ion trajectory 64 depicted in FIG. 4C and as described above. In one embodiment, the processor 50 is operable to maintain the operating state illustrated in FIG. 4C until the ion passes through the charge detection cylinder CD a selected number of times. In an alternate embodiment, the processor 50 is operable to maintain the operating state illustrated in FIG. 4C for a selected time period after controlling M1 (and M2 in some embodiments) to the ion reflection mode (R) of operation. In either embodiment, the number of cycles or time spent in the state illustrated in FIG. 4C may illustratively be programmed, e.g., via instructions stored in the memory 54, or controlled via a user interface, and in any case the ion detection event information resulting from each pass by the ion through the charge detection cylinder CD is temporarily stored in the processor 50, e.g., in the form of an ion measurement file which may illustratively have a predefined data or sample length. When the ion has passed through the charge detection cylinder CD a selected number of times or has oscillated back-and-forth between the ion mirrors M1 , M2 for a selected period of time, the total number of charge detection events stored in the processor 50 defines an ion measurement event and, upon completion of the ion measurement event, the stored ion detection events defining the ion measurement event, e.g., the ion measurement event file, is passed to, or retrieved by, the processor 52. The sequence illustrated in FIGS. 4A - 4C then returns to that illustrated in FIG. 4A where the voltage sources V1 , V2 are controlled as described above to control the ion mirrors M1 , M2 respectively to the ion transmission mode (T) of operation by establishing ion transmission fields within the regions R1 , R2 of the ion mirrors M1 , M2 respectively. The illustrated sequence then repeats for as many times as desired.

[0050] Heretofore, ion measurement event files were analyzed in the frequency domain using a Fast Fourier Transform (FFT) algorithm. In such implementations, the mass-to-charge ratio (m/z) of the ion was calculated from the fundamental oscillation frequency (fO) of the signal using a calibration constant (C) (Equation 1), and the charge of the ion was determined by the magnitude of the fundamental frequency peak in the FFT. Equation 1 :

[0051] Since only the fundamental frequency was used in determining the ion charge, the signal can be thought of as being expressed as only a single sine wave. However, a significant amount of information about the signal is unused by the FFT because higher order harmonics are disregarded. This means the signal must be measured for longer to obtain charge-state resolution. Expressing the waveform more completely would decrease the amplitude uncertainty, therefore improving the charge precision and reducing the trapping time that is necessary to reach charge-state resolution. Moreover, while the peak magnitude in FFT analysis depends on factors like the signal duty cycle, the time domain signal amplitude is constant for a given charge and the amplitude measurement in the time domain is independent of the duty cycle. These characteristics make time domain analysis advantageous for applications with time-variant signal transients such as those found in CDMS where the ion oscillation frequency and the signal duty cycle change as the ion loses energy by collisions with the background gas and electrostatic interactions with the detection cylinder.

[0052] The following describes a process for analyzing the signal measurements contained in the ion measurement event files in the time domain in conjunction with the FFT that incorporates information contained within higher order harmonics by fitting the signal measurements to a simulated waveform to more precisely measure the ion charge. In the following description, the ELIT is designed such that the time-domain charge detection signals CHD stored in the ion measurement event files are square- wave signals (i.e., with 50% duty cycle), although it will be understood that in alternate implementations the ELIT may be designed such that the duty cycle of the time-domain charge detection signals CHD is greater or less than 50%. With 50% duty cycle signal measurements contained in the ion measurement files, the following algorithm improves the charge magnitude determination precision by 15% to 20% compared to the FFT, reaching the statistical lower limit for amplitude uncertainty for a square wave corrupted with Gaussian noise. The best charge standard deviation that can be achieved for a square wave is related to the standard deviation of the noise (o _n0 ise) and the number of points the waveform spends in the HI state compared to the points spent in the LO state (NHI and NLO, respectively) with the following relationship:

Equation 2:

[0053] Referring now to FIG. 5, a simplified flow diagram is shown of an embodiment of a process 100 for analyzing the signal measurements contained in an ion measurement event file in the time domain to determine the frequency and the charge magnitude (z) of the ion oscillating back and forth through the charge detection cylinder of the ELIT during an ion trapping event. From this frequency determination, the mass-to-charge ratio (m/z) of the ion is determined from equation 1 , and the mass of the ion is determined as a product of m/z and z. Illustratively, the process 100 is stored in the memory of the processor 16 in the form of instructions executable by the processor 16 to carry out the functionality of the process 100.

[0054] The process 100 begins at step 102 where a time window counter, N, is initialized to 1 (or some other constant value). The process 100 is illustratively designed to analyze the signal measurements contained in an ion measurement event file by analyzing signal measurements in each of a plurality of sequential time windows of the measurement event file. This file windowing approach advantageously reduces the effect of a time-varying frequency and duty cycle on the measured amplitudes as long as the frequency and duty cycle of the signal measurements do not substantially change in each time window, thereby allowing for an approximation of these parameters to be constant for the duration of each window. In one example implementation in which the ion measurement event file is approximately 100 ms in length and contains approximately 1 ,000 cycles of signal measurements, the time windows are illustratively selected to each be 10 ms in length with each of the 10 time windows contain 100 cycles of signal measurements. [0055] Following step 102, the process 100 advances to step 104 where the processor 16 is operable to perform an FFT analysis of the 1 ^st time window of the signal measurements contained in an ion measurement event file (hereinafter ion measurement signal IMS), and to determine the fundamental oscillation frequency (FFFT) and the charge magnitude (CHFFT) of the 1 ^st time window of the IMS signal in a conventional manner as described above. In one example implementation, CHFFT is multiplied by 2.955 ADC bits/e to obtain the time domain signal amplitude in ADC bits for later use in the process 100.

[0056] Following step 104, the process 100 advances to step 106 where the processor 16 is operable to generate a simulated ion signal (SIS) for the Nth time window using input parameters F, CH, PH and DC, where F is frequency, CH is charge magnitude, PH is phase and DC is duty cycle.

[0057] In one example implementation, SIS was generated by simulating in the ELIT a trajectory of one 130 eV/z ion with an m/z of 25,600 TH using a Beeman algorithm (a modified Velocity Verlet algorithm) in Fortran at 10.02306 kHz using electric fields calculated by SIMION 8.1 . The signal for that ion was generated by superimposing the ion trajectory over a potential array where the charge detection cylinder has +1 and all other electrodes are held at ground. This generates a signal 160 that is normalized to +1 in accordance with Green’s Reciprocity Theorem as depicted by example in FIG. 6. The signal 160 is broken up into two sections; 1 negative-going transition 160A and a positive-going transition 160B. One period of the signal was fit using two bi-dose sigmoidal curves in OriginPro 2018. One curve was used for the positive-going transition 160B (for when an ion enters the detection cylinder), and a separate curve was used for the negative-going transition 160A (for when an ion exits the cylinder) according to the following equation,

Equation 3:

575(t) - A(s, (0 + ¾(0) where t is time, p is a general fitting parameter for a sigmoidal curve, and h, and I2 describe the time at which the SIS waveform 160 rises or falls. These values were additively adjusted by ADC to change the duty cycle of the positive-going transition while the negative-going transition is left constant as depicted by example in FIG. 7 in which the duty cycle of the generated waveform 160 is varied from 40% (trace 170A) to 60% (trace 170C) with the nominal 50% duty cycle (trace 170B) shown for comparison. [0058] In equation 3, fscaiing is the desired frequency divided by the nominal frequency used in initially creating an analytical function for this waveform (e.g., 10.02306 kHz). An example such analytical function is illustrated in FIG. 8 in which the signal 160 is variable between a lower frequency 180A, e.g., 10 kHz, and a higher frequency 180B, e.g., 15 kHz. T is the wave period duration, the time that has elapsed since the last wave period has begun is t-to and A is the amplitude. Phase is adjusted by adding a phase time to to which shifts the waveform by a specified time. The variables hi and fi2 describe the rate at which a wave transitions between LO to HI or HI to LO states. Smaller h values produce a more rounded waveform while higher h values generate a waveform with steeper transitions. The variable hscaiing multiplicatively adjusts h to adjust the transition slope. The minima and maxima for these curves were constrained to 0 and +1 , respectively so they could be concatenated end-to-end to generate a periodic waveform. The SIS waveform was then scaled to an amplitude of 1500 ADC bits and centered around zero.

[0059] A discrete-time first-order recurrence relation implementation of a high pass filter (t=7.89320623c10 ⁵ s) was applied to the SIS waveform 160 to apply an RC decay 190 noted on an existing mass spectrometer, as depicted by example in FIG. 9. A decay constant multiplied by the symmetric numerical derivative of the waveform generated the RC-decayed point i of the SIS waveform function in accordance with the following equation.

Equation 4:

[0060] The T constant was determined by applying a square wave produced by a function generator to an antenna in proximity to the charge detection cylinder on the spectrometer and fitting a square wave in the time domain with different RC values to find the value that gave the best fit. The variable At represents the time of a single ADC sample (400 ns).

[0061] Referring again to step 106 of the process 100 of FIG. 5, for the first pass of the first time window (N = 1) of simulated ion signal SIS, F = FFFT, CH = CHFFT, PH = zero and an estimate of DC = 49.2% corresponding to the duty cycle for an ion traveling an axial trajectory at 130 eV/z. A cross-correlation is further illustratively performed at step 106 between the first time windows of IMS and SIS as depicted by example in the process 200 illustrated in FIG. 10. In this process 200, the initial SIS (with PH = 0) is cross-correlated with IMS by shifting SIS over by one sampling point (e.g., 400 ns) and then calculating a variance, e.g., using a conventional sum of residual squares (SRS), between IMS and SIS at each phase. The minimum of the resulting correlation function (where the IMS and SIS phases match to the nearest acquisition point) then illustratively serves as an initial, non-zero estimate for the phase of the PH in the SIS signal.

[0062] With the simulated ion signal (SIS) generated and populated within initial input parameter values as just described, the process 100 advances from step 106 to step 108 where the processor 16 is operable to determine a variance between IMS and SIS. In one embodiment, the signal variance is determined using a conventional sum of residual squares (SRS) according to the following equation where, in one implementation, M = 25,000 acquisition points (the number of points in a 10 ms window of an IMS file), although in alternate implementations M may be any positive integer.

Equation 5 :

In alternate embodiments, other conventional variance-determining equations and/or process may be used.

[0063] In any case, following step 108, the process 100 advances to step 110 where the processor 16 is operable to determine whether the variance process executed at step 108 has converged. Illustratively, convergence at step 110 is carried out by comparing the results of equation 5 to the results of the previous execution of equation 5. On the first execution of step 110, there will be only a single execution of equation 5 so the process 100 follows the NO branch of step 110 to step 112 where the processor 16 is operable to execute an optimization algorithm configured to reduce the variance between IMS and SIS.

[0064] The variance determined at step 108 between IMS and SIS for each combination of input parameters illustratively produces a cost function that can be minimized at step 112 using any of a variety of conventional optimization algorithms.

In one example implementation, a conventional gradient descent method is illustratively used as the optimization algorithm. This particular optimization method is advantageous in the present context because significant throughput improvements can be realized by employing fast first-order approximation algorithms. This makes it possible to accelerate this analysis method to keep up with real-time data acquisition without substantial increases in computational expense. In alternate embodiments, one or more other conventional optimization algorithms may be used.

[0065] In the gradient descent optimization, the IMS and SIS are compared by calculating the SRS between them for a particular set of input parameters. The input parameters are then varied by a relatively small amount to determine the numerical partial derivative of SRS with respect to each of the input parameters. Following the partial derivative calculation, the input parameters are adjusted at step 114 by their respective partial derivatives multiplied by unique learning rates (y) for each input parameter based on their individual rates of convergence. If X _n is the vector of parameters at iteration n and g is the vector of learning rates, then the gradient descent equation for step n+1 can be written as follows (Equation 6). Here F, DC, PH, CH, and S represent the frequency, duty cycle, phase, amplitude, and transition slope parameters, respectively, used in the synthesis of a noiseless waveform.

Equation 6: dSRS dSRS _„ dSRS _r dSRS _f dSRS

VSRS = t + m ~dF f me ' ⁺ dPH ^{k ÷} dCH ^{1 +} dS x _ii+l = Xn - y V5fiS(X _B ) [0066] It should be noted that the transition slope, S, is not applicable with square waves as transitions are instantaneous, and the transition slop omitted in such cases as in the process illustrated in FIG. 5. In any case, using the adjusted parameters resulting from execution of step 114, the process loops back to step 106 where the processor 16 is operable to generate a new simulated ion signal (SIS). This iterative process of steps 106-114, also depicted in alternate form by the process 210 illustrated in FIG. 11 , is continued until the processor 16 determines at step 110 that a convergence limit is reached. In one embodiment, this convergence limit is set by the ratio of the SRS at a current iteration (SRS _n ) and the SRS (SRS _n -i) at the previous iteration. If SRS _n /SRS _n -i is sufficiently close to unity, e.g., between 0.99999999 and 1 , for more than a predetermined number, e.g., 50, of iterations, the processor 16 is operable to determine that the fit has converged. An example of a portion of a best-fit waveform 240 at convergence is illustrated in FIG. 13 superimposed over an IMS signal 230 that has been corrupted by noise.

[0067] Following the YES branch of step 110, the process 100 advances to step 116 where the processor is operable to determine the frequency F(N), the charge magnitude CH(N) and the duty cycle DC(N) of the Nth time window of IMS fitted to SMS. The frequency, F(N), of the Nth time window of the ion measurement signal IMS is illustratively computed directly from the time-based transitions of the signal cycles (e.g., approximately 100 cycles in the example implementation described above). The charge magnitude, CH(N), of the Nth time window of the ion measurement signal IMS is illustratively computed as an average of the amplitudes of the cycles making up the Nth time window, and DC(N) is the most recent value of DC at convergence.

[0068] Following step 116, the process 100 advances to step 118 where the processor 16 is operable to determine whether the last time window of the ion measurement signals IMS has been processed. If not, the process 100 advances to step 120 where the processor 16 is operable to advance the time window by a duration DT, e.g., 10 ms. Thereafter at step 122, the processor 16 is operable to increment the time window counter N by 1 , and to set initial values for the input parameters F, CH and DC. After the first time window (N=1 ) has been analyzed, the initial guess for the subsequent window consists of the best-fit frequency, duty cycle, and charge amplitude of the previous window. For each window N > 2, the first 50 iterations of the iterative process of steps 106-114 are illustratively reserved for finding the phase, PH, for the next window and then subsequent iterations optimize all parameters until convergence has been reached. This is illustrated graphically in FIG. 12 as a plot of SRS vs. iteration number in which the waveform 220 show the first 50 iterations being relatively flat as the phase, PH, is found, after which the waveform 220 moves toward convergence.

[0069] If, at step 116, the processor 16 determines that the last time window of IMS has been processed, the process 100 advances to step 124 where the frequency values F(N) of the plurality of time windows are processed by the processor 16 to determine the fundamental frequency FIMS of the ion measurement signal. In some embodiments, measurements of the ion oscillations within the ELIT are not recorded immediately in order to allow transients, resulting from switching voltages on the ion mirrors M1 , M2, to subside. Thereafter, the ion typically loses energy as it oscillates back and forth between the ion mirrors M1 , M2 due to collisions with the background gas and electrostatic interactions with the charge detection cylinder. Such loss of energy results in an increase in frequency as the ion continues oscillating back and forth between the ion mirrors M1 , M2 as depicted graphically in FIG. 11. In such embodiments, the fundamental frequency FIMS is illustratively determined by fitting a line to the frequencies F(N) of all of the time windows as a function of time and then extrapolating to the beginning of the trapping event to determine FIMS before the ion lost any energy, which is also shown graphically in FIG. 11 with the fundamental frequency FIMS depicted as fo. The mass-to-charge ratio of the ion is then computed using FIMS with equation 1 . In other embodiments with shorter trapping times and/or improved ELIT structures, ions may not lose appreciable energy during a trapping event, and in such embodiments the fundamental frequency FIMS may be computed as an average of F(N) over the N windows.

[0070] The processor 16 is further operable at step 124 to process the charge magnitude values CH(N) of the plurality of time windows to determine the charge magnitude CHIMS of the ion. Since the charge is constant across the IMS file, the charge CHIMS is illustratively determined by averaging the charge magnitude values CH(N) across all N windows. EXAMPLE

[0071] FFT analysis of 1000 files containing a square wave signal corrupted with 1000 ADC bits RMSD of Gaussian noise with a duration of 100 ms resulted in a charge RMSD of 1 .65 elementary charges (e). Time domain analysis of the same files, using the techniques described herein, resulted in an RMSD of 1 .35e. In addition, the amplitude reported by the time domain analysis is not dependent on the RC decay, increasing the signal-to-noise ratio by 1%. In total, this represents a 19% improvement in charge precision compared to the FFT. The theoretical best charge RMSD was achieved for the 50% duty cycle square wave with time domain analysis (per Equation 1 : a _nOi se=1000 ADC bit, NHI=NLO=125,000 points at a 50% duty cycle, O _b es _t =4 ADC bits or 1 .35 elementary charges). An identical analysis was performed for files containing simulated ion signal corrupted with 1000 ADC bits RMSD of Gaussian noise and resulted in an RMSD of 1 .65e for the FFT analysis and 1 .45e RMSD for time domain analysis, representing a 13% improvement in charge precision.

[0072] The decreased improvement in charge precision for the simulated ion signal compared to the square wave can be understood by examining the Hessian matrix of second order partial derivatives for each of the parameters being fit by this algorithm.

Equation 7:

If the Hessian matrix is diagonally dominated, then the optimization problem becomes well-posed where there is a clear global minimum and uncertainties from each of the parameters do not couple to each other. In this situation, the parameters are linearly independent and first-order gradient descent algorithms can quickly solve these problems. This is realized in a square wave signal where the transitions between HI and LO states of the signal are instantaneous (at least within the temporal resolution offered by a 2.5 MHz sampling frequency). This means the height of each transition and the time at which they occur is independent of parameters such as the amplitude, frequency, duty cycle, and phase of the signal. On the other hand, the Hessian matrix for an ion signal that has gradual transitions between HI and LO states is not diagonally dominated and has significant contributions from the mixed partial derivatives which link the parameters and their respective uncertainties to each other. This means the rise and fall times of the transitions become a function of the frequency which couples the uncertainty in the frequency to the uncertainty in all other parameters (i.e. not knowing when a transition occurs means the duty cycle cannot be confidently assigned, which is compensated by an incorrect amplitude measurement). A unique solution does not exist for these ill-posed optimization problems and it is difficult to converge towards the cost function minimum when the signal is obscured by noise. Parameter interdependence may be minimized by designing a detection system that generates signals with sharp transitions between the LO and HI states. For example, this could be accomplished by minimizing the detection cylinder inner diameter so the ion signal has rapid rise and fall times.

[0073] In alternate embodiments, the ion signal best-fit bi-dose sigmoidal equations may be modified to fit to signals generated by mass spectrometers to account for signal shape distortions arising from geometric imperfections and/or other design features of the ELIT. The more accurately the actual instrument ion signal is known, the more precisely the waveform synthesis function can be applied to fitting the instrument signal. While any function can be used in the waveform synthesis subroutine to fit any signal, it should be noted that the theoretical precision of the parameters will depend on the waveform characteristics. Finally, faster optimization algorithms or algorithms more suitable for nonlinear optimization problems such as the simplex optimizer can be employed to fit the noiseless waveform to a signal. In addition, a significant throughput improvement can be realized by designing a system that generates signal which can be fit with fast first-order gradient descent algorithms with momentum such as AMS Grad. Alternatively, the number of steps needed to reach convergence can be minimized by employing second-order optimization schemes such as Newton’s Method. With these improvements, it is possible to perform time domain analysis on files in conjunction with real-time FFT analysis. [0074] While this disclosure has been illustrated and described in detail in the foregoing drawings and description, the same is to be considered as illustrative and not restrictive in character, it being understood that only illustrative embodiments thereof have been shown and described and that all changes and modifications that come within the spirit of this disclosure are desired to be protected. For example, it will be understood that the ELIT 14 illustrated in the attached figures and described herein is provided only by way of example, and that the concepts, structures and techniques described above may be implemented directly in ELITs of various alternate designs. Any such alternate ELIT design may, for example, include any one or combination of two or more ELIT regions, more, fewer and/or differently-shaped ion mirror electrodes, more or fewer voltage sources, more or fewer DC or time-varying signals produced by one or more of the voltage sources, one or more ion mirrors defining additional electric field regions, or the like. As another example, in some alternate embodiments the process illustrated in FIG. 5 may be used only to determine the charge magnitude, CHIMS (i.e., z), of an ion in a trapping event, and the conventional FFT approach described above may be used to determine the mass-to-charge ratio (m/z). As yet another example, the process illustrated in FIG. 5 may be modified to take into account possible variances in the frequency measurements within one or more of the time windows and/or the entire ion measurement file may be processed in a manner which takes into account any such possible variances in the frequency measurements.