Background of the Invention Optical interconnect technology has been successfully implemented in long distance telecommunications, in local area network communication systems, in computer-to- computer, and board-to-board interconnections. The complexity and speed of integrated circuit devices such as microprocessors continue to increase at a very high rate. However, the input and output (I/O) capability of these devices has not been able to scale at the same rate, because of the existing limitations in electronic packaging of these devices. Also, the current technologies of integrating large arrays of opto-electronic devices with integrated circuit devices require bottom emitting/detecting of a light beam, and these methodologies are generally not scalable for a wafer-scale fabrication and/or integration of both emitters and detectors.

Therefore there is a need for a method of packaging an opto-electronic device with an integrated circuit device for a scalable wafer-scale fabrication, and at the same time providing a large-scale I/O capability to an integrated circuit device.

Summary of the Invention These and other aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings, or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims and their equivalents.

According to one aspect of the present subject matter, a method of packaging an opto-electronic integrated circuit device includes forming top emitter/detector devices on a substrate such that the top emitter/detector devices have top contact pads on a top side of the top emitter/detector devices, wherein the top side is disposed across from the substrate, and further the substrate has a bottom side that is across from the top side of the top emitter/detector devices. An optically transparent superstrate is attached onto the top side of the top emitter/detector devices such that the optically transparent superstrate having a top surface across from the top side of the top emitter/detector devices. The top contact pads are exposed on the bottom side of the substrate. The bottom contact pads are formed on the bottom side and the bottom contact pads are connected to the top contact pads to bring the top contact pads to the bottom side. The bottom side contact pads are bonded with matching pads of an integrated circuit device to form an opto-electronic integrated circuit device having a high density optical I/O on an integrated circuit device.

Other aspects of the invention will be apparent on reading the following detailed description of the invention and viewing the drawings that form a part thereof.

Brief Description of the Drawings In the drawings, like numerals describe substantially similar components throughout the several views. Like numerals having different letter suffixes represent different instances of substantially similar components.

Figure 1 is a sectional view of one embodiment of the packaging technique of a device packaged according to the invention.

Figure 2. is a flow diagram of an illustrative method of packaging a device according to the invention.

Detailed Description In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It is understood that the embodiments may be combined, that other embodiments may be utilized, and that structural, logical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims and their equivalents.

In this document the term top emitter device is understood to refer to a vertical cavity surface emitting laser (VCSEL) or similar device that emits light away from a substrate, and the top detector device refers to a metal-semiconductor-metal photodetector (PD) or similar device. In this document, top side refers to a growing side of the top emitter/detector devices on a substrate, and bottom side refers to a side on the substrate that is across from the top side. Opto-electronic device refers to a substrate including top emitter/detector devices on a top side, and further including a transparent superstrate on the top emitter/detector devices. Top emitter/detector refers to devices emitting and detecting light from the top side of the top emitter/detector devices. The term superstrate refers to a wafer of optically transparent material disposed on a semiconductor substrate including a plurality of top emitter and top detector devices. Also, top surface refers to a surface on the transparent superstrate that is across from the top side, and bottom surface is referred to the exposed top emitter/detector devices and the bottom surface is also understood to be disposed across from the top surface.

Figure 1 is a front sectional view, illustrating generally, by way of example, but not by way of limitation, one embodiment of packaging an opto-electronic integrated circuit device 100 according to the present invention. This is accomplished in this embodiment by forming top emitter/detector devices on a thinned substrate 110 such that the top emitter/detector devices have a top side 117 across from the thinned substrate 110. In this embodiment the thinned substrate has a bottom side 115 across from the top side 117. Top emitter/detector devices 110 emit and detect light away from the thinned substrate 110. Top emitter/detector devices have top contact pads 113 on the top side 117. In one embodiment the thinned substrate is a wafer of gallium arsenide. In this embodiment the wafer of gallium arsenide includes plurality of top emitter/detector devices. The top emitter device is a vertical cavity surface emitting laser (VCSEL) device capable of emitting light away from a planar surface of the substrate, and the top detector device is a metal-semiconductor- metal photodetector device. In this embodiment, the top emitter/detector devices on the thinned substrate 110 are capable of emitting and detecting a light of 850 nanometers wavelength.

An optically transparent superstrate 120 is attached to the top side 117 of the top emitter/detector devices on the thinned substrate 110 such that the optically transparent superstrate 120 is across from the bottom side 115. The optically transparent superstrate has a top surface 125 across from the top side 117. The optically transparent superstrate 120 is . made from a wafer of sapphire in this example. In another embodiment, the optically transparent superstrate is a wafer of glass. In a further embodiment, the materials of optically transparent superstrate 120 and the top emitter/detector devices on thinned superstrate 110 have similar thermal properties so that they can withstand rapid thermal cycling introduced during subsequent processing and packaging. The optically transparent superstrate 120 can be bonded to the top emitter/detector devices 110. In this embodiment the bonding adhesive also has thermal properties similar to that of the optically transparent superstrate and the top emitter/detector devices. The optically transparent superstrate 120 is transparent to a light of 850 nanometers wavelength. The thickness of the optically transparent superstrate 120 is sufficient to impart mechanical strength to the thinned substrate including the top emitter/detector devices 110.

The opto-electronic integrated circuit device 100 can further include micro-optic devices 130 attached to the top surface 125 of the optically transparent superstrate 120. In this embodiment the micro-optic devices 130 are aligned with the top emitter/detector devices 110 to provide an optical processing capability to the top emitter/detector devices on the thinned substrate 110. In one embodiment the optical processing includes beam shaping for the top emitter/detector devices 110.

The top side contact pads of the top emitter/detector devices 110 are brought to the bottom side contact pads by a through-the-via metal layer 122. An integrated circuit device 150 is attached to the top emitter/detector devices 110. The bottom side contact pads 140 of the top emitter/detector devices on the thinned substrate 110 can be bump bonded, using solder balls 160, to matching pads 124 of the integrated circuit device 150 to provide a high capacity optical I/O capability to the integrated circuit device 150.

Figure 2. is a flow diagram illustrating generally one embodiment of a method 200 of packaging an opto-electronic device having a high density I/O capability to an electronic integrated circuit device. Method 200 includes forming top emitter/detector devices on a top side of a substrate, block 210. In this embodiment, the top emitter/detector devices have top contact pads on the top side. The substrate includes a back side that is across from the top side. The top emitter/detector devices further includes an etch stop layer on the top side.

The top emitter device includes a VCSEL capable of emitting light away from the substrate, and the top detector includes a metal-semiconductor-metal PD. Forming of the top emitter/detector devices on the substrate comprises forming 2-dimensional arrays of VCSELVPD devices on a wafer, which can be of gallium arsenide. The top emitter/detector devices can have a pitch of 50 micrometers or less, and the wafer of gallium arsenide can be about 625 microns in thickness. The top emitter/detector devices on the substrate can be tested and qualified at this point if desired.

The next step 220 in the process is attaching an optically transparent superstrate 120 onto the top side of the top emitter/detector devices such that the optically transparent superstrate has a top surface across from the top side of the substrate 220. The optically transparent superstrate can be made from a material transparent to the light of 850 nanometers wavelength, such as sapphire or glass. The optically transparent superstrate is of sufficient thickness to provide mechanical support to the exposed top emitter/detector devices. The optically transparent superstrate and the top emitter/detector devices can be made of materials having similar thermal properties, to withstand thermal cycling introduced during subsequent processing and packaging.

The next step 230 in the process is exposing the top contact pads to the bottom side 240. This step can be achieved by thinning the substrate from the back side of the substrate such that the top contact pads are exposed to the bottom side. The thinning step can also include forming via in the substrate from the thinned bottom side to expose the top contact pads to the bottom side. A via can be formed by chemically etching the bottom side of the thinned substrate to the etch stop layer, to expose the top contact pads to the bottom side.

Alternatively, the forming the via comprises mechanically drilling the bottom side of the thinned substrate to expose the top contact pads to the bottom side. Thinning can be by mechanically lapping the bottom side of the gallium arsenide substrate to a thickness of about 50 microns. The exposing step can also include removing the substrate to expose the top contact pads to the bottom side.

Step 240 in the process includes forming bottom contact pads on the bottom side.

The next step 250 includes connecting the bottom contact pads with the top contact pads to bring the top contact pads to the bottom side to form an opto-electronic device. This can be done by plating the bottom contact pads to bring the top contact pads to the bottom side.

Plating cn include forming through-the-via metal to bring the top contact pads to the bottom side. This has an advantage in that the back side contact pads and matching pads of an integrated circuit device would be in the same plane, making it easy to further bond the opto-electronic device to the integrated circuit device and to provide the capability of having a high density I/O to the integrated circuit device. Also, having the back side contact pads and matching pads of an integrated circuit device in the same plane facilitates locating the front side contact pads anywhere as needed, for example to avoid interfering with the location of the emitter/detector devices.

Step 260 in the process involves integrating a wafer of micro-optic devices 130 onto the top surface of the optically transparent superstrate 120 such that the micro-optic devices are aligned with corresponding top emitter/detector devices 260 to provide an optical processing capability to them. Optical processing can include, for example, beam shaping, focusing a light beam, filtering the light beam, and tilting the light beam. The wafer of micro-optic devices can be fabricated on a separate substrate, then tested and qualified before integrating it onto the opto-electronic devices. The wafer of micro-optic devices can be bonded to the top surface of the optically transparent superstrate.

Step 270 in the process bonds the opto-electronic devices to the integrated circuit.

This can include dicing the opto-electronic devices including the micro-optic devices, to produce opto-electronic chips. Then the back side contact pads of the opto-electronic chips are bump bonded with matching pads of an integrated circuit device to produce an opto- electronic integrated circuit device having a high density optical I/O on an integrated circuit device.

Conclusion The above described method provides, among other things, an integrated circuit device having a high I/O capacity in an optical domain. The high I/O capacity is accomplished by forming top emitter/detector devices on a top side of a substrate, wherein the substrate has a bottom side across from the top side. The top emitter/detector devices emit and detect light on the top side. The top emitter/detector have top contact pads on the top side. The top contact pads are brought to the back side by connecting the top contact pads with bottom contact pads. An optically transparent superstrate is attached to the top side of the top emitter/detector devices such that the optically transparent superstrate is across from the bottom side and the optically transparent superstrate has a top surface across from the top side forming an opto-electronic device. Micro-optic devices can be attached to the top surface of the transparent substrate such that the micro-optic devices provide optical processing capability. Then an integrated circuit device is attached to the bottom side of the substrate such that the bottom contact pads are in contact with matching pads of the integrated circuit device to form an opto-electronic integrated circuit device having a high I/O capacity.

It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reviewing the above description. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.