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Title:
A TORQUE RIPPLE REDUCTION DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/021127
Kind Code:
A1
Abstract:
A torque ripple reduction device for an induction motor comprises: a sensor adapted to be connected to a motor to be driven. The device is configured with at least one characteristic of the motor. The sensor provides an input current signal indicative of the speed of the motor. A control means determines whether the speed is less than or greater than a specified threshold. The control means varies the amplitude of a drive voltage by modulating an input drive signal according to a predetermined phase relationship in dependence upon the speed of the motor, when the speed is less than the specified threshold. The control means also applies a feed-forward input drive signal, when the speed is greater than a second specified threshold. An advantage of the device is that it reduces higher order harmonics, in particular, the 5th and 7th order harmonics that are present in induction (IM) motors as a consequence of quasi-sine output drives.

Inventors:
PETO, Raymond (Westfield House, Puncknowle, Dorchester Dorset DT2 9BP, DT2 9BP, GB)
Application Number:
IB2018/055384
Publication Date:
January 31, 2019
Filing Date:
July 19, 2018
Export Citation:
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Assignee:
QUEPAL LIMITED (14A Albany Road, Weymouth Dorset DT4 9TH, DT4 9TH, GB)
International Classes:
H02P29/50; H02M7/48; H02P25/098
Foreign References:
EP1833153A22007-09-12
EP2430506A12012-03-21
JPH04251597A1992-09-07
JPS56115191A1981-09-10
Other References:
VENKATARAMANAN G ET AL: "PULSE WIDTH MODULATION WITH RESONANT DC LINK CONVERTERS", IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 29, no. 1, 1 January 1993 (1993-01-01), pages 113 - 120, XP000358871, ISSN: 0093-9994, DOI: 10.1109/28.195896
SOLIMAN; HAKIM, IJ R RAS, vol. 12, no. 3, September 2012 (2012-09-01), pages 481 - 497
PANDA; PATTNAIK; MOHAPATRA: "A Novel Soft-Switching Synchronous Buck Converter for Portable Applications", INTERNATIONAL J OURNAL OF POWER MANAGEMENT ELECTRONICS, vol. 2008
Attorney, Agent or Firm:
WALKER, Neville (21A Commercial Road, Swanage Dorset BH19 1DF, BH19 1DF, GB)
Download PDF:
Claims:
C laims

1. A torque ripple reduction device for an induction motor comprises: a sensor adapted to be connected to a motor to be driven and the device is configured with at least one characteristic of the motor, the sensor provides an input current signal indicative of the speed of the motor; a control means determines whether the speed is less than or greater than a specified threshold, the control means varies the amplitude of a drive voltage by modulating an input drive signal according to a predetermined phase relationship in dependence upon the speed of the motor, when the speed is less than the specified threshold; and the control means applies a feed-forward input drive signal, when the speed is greater than a second specified threshold.

2. A torque ripple reduction device according to claim 1 includes a fine-tuning means which feeds back a fine tune signal.

3. A torque ripple reduction device according to claim 1 or 2 wherein the feed-forward input drive signal is generated using a signal derived using the input current signal.

4. A torque ripple reduction device according to any preceding claim wherein the feedforward input drive signal is used to control a means for adjusting an input voltage in order to vary torque at low frequencies.

5. A torque ripple reduction device according to any preceding claim includes at least one shunt capacitor operable to modify the drive voltage from quasi-sine to approximate to a sine wave.

6. A torque ripple reduction device according to any preceding claim wherein a microprocessor generates the feed-forward input drive signal.

7. A torque ripple reduction device according to any of claims 4 to 6 includes a feedback circuit with a resonant half bridge operable to switch on independently of at least one of the following: input voltage, load, load current, shunt capacitor values, inductance and resistance of the motor.

8. A torque ripple reduction device according to any preceding claim wherein a self- adjusting detection circuit applies either a quasi-sine input drive signal or a pure sine input drive signal.

9. A torque ripple reduction device according to any preceding claim wherein an override switch is configured to switch on/off when a negative drive current is sensed by a detector.

10. A controller for controlling an induction motor or a permanent magnet motor or a switched reluctance motor includes: a torque ripple reduction device according to any of claims 1 to 9 and at least one shunt capacitor for modifying an input voltage waveform from a quasi-sine wave towards a sine wave at frequencies in excess of 1 /3 full speed frequency.

1 1 . A permanent magnet motor includes the torque ripple reduction device according to any of claims 1 to 9.

12. A switched reluctance/variable reluctance motor includes the torque ripple reduction device according to any of claims 1 to 9.

13. An induction motor includes the torque ripple reduction device according to any of claims 1 to 9.

14. A method of controlling a motor, according to any of claims 1 1 , 12 or 13, employing the torque ripple reduction device according to any of claims 1 to 9, wherein a sensor provides an input control signal indicative of at least one of: motor speed and motor drive current.

15. A method according to claim 14 wherein a variable is integrated/differentiated in order to derive a second variable.

16. A vehicle including the motor of any of claims 1 1 , 12 or 13.

17. An electrical appliance, such as a pump, tool, drive system or machine, including the motor of any of claims 1 1 , 12 or 13.

Description:
A Torque R ipple R eduction Device

F ield

The invention relates to improvements in electrical power converters, in particular the invention relates to a torque ripple reduction device to improve efficiency of converting electrical energy to mechanical energy, and vice versa.

An aspect of the invention relates to a torque ripple reduction device. More particularly but not exclusively, that aspect of the present invention relates to a torque ripple reduction device for use with an induction motor or a switched (variable) reluctance motor or a permanent magnet (P M) motor.

Background

Induction motors are becoming more pervasive and used in an ever wider range of applications. Induction motors include the class of motors known as asynchronous permanent magnet (AP M) motors which in recent years have become cheaper and more reliable. As well as being potentially smaller than existing electric motors, asynchronous permanent magnet (AP M) motors offer greater potential for being more efficient than existing electric motors.

In particular the efficiency of permanent magnet (P M) motors remains constant across a wide range of speeds which is not always the case with many types of existing electric motors. F urthermore permanent magnet motors are also able to provide a constant torque output unlike many existing electric and induction motors. In this sense P M motors are more predictable, and so easier to control. T hey are also more efficient than most types of existing electric and induction motors.

Another advantage offered by permanent magnet (P M) motors is that they can have low acoustic noise outputs and lower electromagnetic outputs than equivalent rated electric and induction motors. The newer types of permanent magnet motor are increasingly compliant with stringent electro-magnetic (E M) emissions regulations such as those proposed in E U Directive 2014/30/E U.

In the particular power range 0.75 kW to 4 kW there is a growing trend to using electronically commutated (E C) motors due to their higher efficiency; whereas for higher power motors there is currently a general preference towards the use of an induction motor and an inverter. Another practical advantage of permanent magnet (P M) motors is that they require relatively little ventilation and cooling; consequently they can be made to be compact. They are also relatively straightforward to operate.

However, despite the many benefits of permanent magnet (P M) motors, a disadvantage of them has been their tendency to exhibit and suffer from harmonics, particularly where current levels are high, for example in the range between 1 6 Amps and 75 Amps. T hese harmonics have tended to be present in the 5 th and 7 th order wave harmonics and in practice some of these harmonics may have had the effect of acting as a brake on the motor and therefore detracted from its efficiency.

It is recognised that attempts to develop existing PW M drive for motors are encountering significant technical obstacles. In order to introduce the potential advantages of newer transistor materials, such as silicon carbide (S iC ) and gallium nitride (Ga N), motor drive circuits are having to deal with increasingly higher switching speeds and much more spiky switching edges. T his in turn has introduced greater complexity in the motor drive circuitry, due to effects such as parasitic impedances. Also these trends have subjected the motor to ever more aggressive waveforms and are likely to cause even greater problems in future motor design and installation. An ever present problem is that of electromagnetic interference (E MI) which increases as switching rates increase.

P rior Art

In a paper by S oliman and Hakim, published in IJ R RAS , at Volume 12, Issue 3 in S eptember 2012, at pages 481 " 497, there is a detailed discussion of the problem and how torque ripple is reduced and harmonics are suppressed in P M synchronous motors using field oriented control.

S oliman and Hakim address how conventional field oriented control for brushless P M synchronous motors depends upon a mathematical model which does not take account of noise, electromagnetic interface, non-sinusoidal flux and harmonics in the motor or in any associated power converter. All these sources of noise are acknowledged as causing performance deterioration of the drive system due to an increase in total harmonic distortion (T H D).

A solution to the problem uses two proportional-integral (PI) controllers: one for controlling torque and the other for controlling flux. The first PI controller derives a torque error signal between a reference value and an estimated torque. This is used to calculate a new q-axis current component representing a modifier current. T his new q-axis current reduces the total harmonic distortion (T H D) but does not entirely solve the problem. Therefore the second PI controller is used to adjust the T H D by comparing the d-axis flux to the rotor permanent magnet flux. The output of the second PI controller is then used as the reference d-axis current and is used to reduce T H D.

J P H04251 597 (Hitachi) teaches a torque ripple reduction technique for an induction motor by operating the induction motor with a chopping frequency lowered according to the lowering of output frequency in a region where the output frequency of the inverter is lower than a rated value, thereby suppressing the error due to a turn OF F lag of main circuit control element

J PS 561 1 5191 (Tokyo S hibauru E lectric C o) describes a system for reducing torque ripple of an induction machine by decreasing the current contributing to field generation in an inverter device for independently controlling the current contributing to torque generation and that contributing to field generation in the induction machine.

One object of the present invention is to provide a torque ripple reduction device for use with induction motors connected to a drive with a quasi-sine output in order to reduce deleterious effects of current harmonics that are caused by discrete voltage steps inherent in some types of motor drive topology.

Another aim of the present invention is to improve motor efficiency and thereby reduce heat loss.

A further aim of the present invention is to provide a device for use with induction motors (IM) in order to reduce unhelpful torque producing higher order harmonics, in particular, the 5 th and 7 th order harmonics that are present in induction (IM) motors as a consequence of using a so-called quasi-sine output drive.

A further aim of the present invention is to provide a device for use with permanent magnet (P M) motors in order to reduce the 5 th and 7 th order harmonics present in permanent magnet (P M) motors.

A further aim of the present invention is to provide a device for use with switched reluctance or variable reluctance (S R or V R) motors in order to reduce low speed torque ripple inherent in their mechanical design.

S ummary of the Invention

According to a first aspect of the present invention that is provided a torque ripple reduction device for an induction motor comprises: a sensor adapted to be connected to a motor to be driven and the device is configured with at least one characteristic of the motor, the sensor provides an input current signal indicative of the speed of the motor; a control means determines whether the speed is less than or greater than a specified threshold, the control means varies the amplitude of a drive voltage by modulating an input drive signal according to a predetermined phase relationship in dependence upon the speed of the motor, when the speed is less than the specified threshold; and the control means applies a feed-forward input drive signal, when the speed is greater than a second specified threshold.

The invention enables waveforms applied to the motor to be manipulated so that the net current flowing in motor windings is almost entirely at the required fundamental frequency.

By adopting a drive based on the fundamental principles outlined below it has been found that it is possible to use lower cost motor materials and components and still obtain superior performance as the motor and components are only ever subjected to a fundamental frequency.

This is because the present invention enables a motor to be operated at its fundamental frequency without having to compromise its design or any drive circuits in order to cope with the issues of electromagnetic compatibility.

The invention also enables use of low quality S R or VR motors as the problem of torque ripple has been overcome.

F urthermore the invention provides a distinction between drive circuits and the motor per se, thus eliminating the interaction between them.

The invention also permits use of S iC and G a N transistor devices as resonant principles used can be applied to any switching speed. The increased switching frequency in the variable voltage output of the drive permits use of smaller inductors

The present invention differs from prior art techniques as tests have shown that in order to achieve maximum system efficiency, and minimum torque ripple, it is advantageous to use: pure sine waves at a fundamental frequency; or an instantaneous variable voltage repetitive waveform at the fundamental frequency; or an instantaneous voltage modified amplitude, of a nominally discrete level waveform such as a quasi-sine wave, at the fundamental frequency.

A waveform of a harmonic higher than its fundamental frequency should not be supplied to the motor because these waveforms waste energy in the motor as these higher frequency currents contribute little to or even negate the useful torque produced by the current at the fundamental frequency.

P referably the feed-forward input drive signal is generated using a signal derived using the input current signal. In one embodiment one or more shunt capacitors are provided which in use modify the drive voltage to approximate to a sine wave.

This aspect of the present invention therefore overcomes problems associated with prior art techniques because it relies on relationships between the voltage applied to motor winding, the dynamic impedance of the drive itself and the dynamic load impedance of the motor and the transform of the load on the motor present both at the instant of switching and during the time interval between switching action.

Fourier analysis of a three phase waveform, applied to a three phase induction motor for example even without the incorporation of the present invention, shows that with a square or modified sine waveform applied to the motor windings, the actual harmonic currents are less than would be expected due to inherent inductance of the motor windings as well as the drive output impedance.

A quasi-sine voltage waveform (with no instantaneous voltage modification) has a derivable series of harmonics, of predictable voltage amplitudes and phases that can be calculated using Fourier analysis. However, the actual currents that flow into a motor as a result of these applied voltages are different in amplitude and phase. T his is because the impedance, presented both by the motor itself and the impedance of the drive itself at each of these frequencies is complex. T his tends to minimise current levels at each harmonic and so reduces the level of torque ripple and resistive losses that might have been expected from an analysis of the harmonics present in the quasi-sine voltage itself.

The current harmonics present in a quasi-square wave can be analysed as follows:

The fu ndamental harmon ic is the desired current waveform in the motor.

The second harmonic and all even harmonics do not exist as their waveforms are a symmetrical AC waveform.

The third harmonic is cancelled because it is a three phase arrangement

The fifth harmon ic is the first harmonic that causes a problem. It is problematic for two reasons. F irstly, it is contra rotating (so gives rise to complex impedances) resulting in a drag or reduction of torque in the motor. S econdly it causes resistive losses at this frequency, thus increasing real power losses through the entire drive system and not just the motor itself.

The seventh harmon ic is the next harmonic that causes a significant problem. It is usually less of a problem than the fifth harmonic. It rotates in the same direction as the fundamental rotation, which means that the torque produced at this frequency is additive, but it is present with a high degree of slip which is inefficient Like the fifth harmonic, its very existence causes extra losses in the entire drive system and not just the motor itself.

The eleventh harmonic has similar characteristics to the fifth harmonic. However the Fourier calculated voltage amplitude is lower than the fifth harmonic and because of the tendency for the load to be inductive, the actual impedance of the load tends to increase with frequency. T he nett result of these two effects is to significantly reduce the losses caused by this harmonic.

The th irteenth harmonic has similar characteristics to the seventh harmonic. However, the Fourier calculated voltage amplitude is lower than the seventh harmonic and because of the tendency for the load to be inductive; the actual impedance of the load tends to increase with frequency. T he net result of these two effects is to significantly reduce the losses caused by this harmonic.

The remaining harmonics, the 17 th and each subsequent harmonic from the 17 th onwards have lesser and lesser effects. F urther analysis of the voltage waveforms applied by the drive to the motor and the consequent current waveforms that occur, show that it is possible to significantly minimise current ripple by a combination of two techniques. T he first technique is by modifying the instantaneous voltage by modulating it with a variable voltage in antiphase and at a frequency that is directly related to the fundamental frequency and the number of poles of the motor. The second technique is to modify the applied waveform by waveform shaping in some manner.

One way of achieving at least one of the aforementioned techniques is by the use of shunt capacitors connected across the motor windings between the drive and the motor. Both these techniques may be used to some degree. F urthermore both may be used at the same or different times, depending on the motor speed and other variables, such as load and required torque.

In addition to the shunt capacitors, a micro-processor or voltage regulator may be employed in order to generate the feed-forward signal for controlling the waveforms applied to the motor at a specific speed. Optionally there is provided a method for measuring the amplitude of a net current supplied to the 3 half bridge part of the drive circuit and to modify the instantaneous drive voltage in the manner of negative feedback so that the speed remains at a steady level.

In the case of a permanent magnet motor or a switched reluctance (S R) motor or a variable reluctance (V R) motor, there is usually some difference in torque generation with respect to rotor angular position. For a switched/variable reluctance motor this difference may be significant. The usual technique of overcoming this was to adopt more poles and so provide higher frequency waveforms. However this has been found not always to be the most efficient solution.

In addition there may be provided a method for measuring pulsed torque and for modifying an instantaneous drive voltage using negative feedback so that it remains at a steady level.

An advantage of applying one, two or more of the aforementioned waveform modification techniques to a motor, according to its speed, is that optimised technique(s) for minimising torque ripple are deployed at any given motor speed.

In the case of an induction motor which is supplied with a quasi-sine waveform, induced current harmonics inherent in this type of approach are relatively easy to negate by an almost instantaneous voltage variation. T his is quite straightforward to implement at relatively low motor speeds. However, as motor speeds increase this becomes more difficult, as the amount of power available from a variable voltage drive becomes limited due to higher frequency, full power bandwidth characteristics of the variable voltage circuitry.

C onsequently waveform modifications that employ the method may incorporate one or more shunt capacitors, connected in parallel with drive circuitry and the motor, so that it becomes more effective at minimising the current harmonics as the motor speed increases. This is because the value of the capacitance can be such that the charging and discharging time of capacitors soften switching edges of a voltage waveform.

P referably the means reduces torque ripple as motor speed increases.

This is because the inertia of the motor itself comes into play here as well.

Although inertia may reduce apparent torque ripple, it will not reduce losses associated with higher harmonic currents that are still present.

Optionally a voltage adjustment means is provided to adjust the voltage in order to vary torque at low frequencies. T he voltage adjustment means may be pre-calibrated or set manually or adjustable automatically for example under control of a microprocessor operating in accordance with software.

Ideally a feedback circuit with a resonant half bridge operable to switch on independent of at least one of the following: input voltage, load, load current, shunt capacitor values, inductance and resistance of the motor.

The torque ripple reduction device may be incorporated in a permanent magnet motor or a reluctance motor or an induction motor.

It is also understood that although the invention has been described with reference to motors the invention may be used in conjunction with an alternator or generator in order to smooth its running and reduce torque ripple and unwanted harmonic currents.

The signal indicative of the speed of the motor is ideally derived from a sensor such as a current sensor, magnetic sensor, an opto-encoder, Hall effect sensor or photo-detector.

The signal indicative of the speed may also be indicative of the angular position between the moving parts and the fixed parts of the motor. T he rate of change of this signal may also give useful information relating to the motor speed change over time.

This rate of change signal (acceleration or deceleration) information can be used to provide an indication of torque ripple at low rotational speeds.

The practical effect of these feed-forward signals has been to :soften " edges of waves as described with reference to F igure 1 below.

P referably the feed-forward signal is generated using a signal derived from an input current; actual motor speed and a signal derived from the actual motor speed. A micro-processor is preferably employed in order to generate the feed-forward signal which is applied to cancel the torque ripple.

Input voltage profile is therefore modified in order to minimise torque losses. T he device may be used in conjunction with permanent magnet motor, switched reluctance motor or an induction motor.

Optionally the method reduces torque ripple of an electric motor comprising the steps of: sensing the speed of the motor; determining whether the speed is less than or greater than a specified threshold, the control means varies the amplitude of a drive voltage by modulating an input drive signal according to a predetermined phase relationship in dependence upon the speed of the motor when the speed is less than the specified threshold; and the control means applies a feed-forward input drive signal when the speed is greater than the specified threshold.

Advantageously a control means varies the first torque ripple reduction method towards the specified threshold and the increase in the waveform modification above the specified threshold can occur at the same time.

It may be advantageous to employ both the aforementioned torque reduction methods to some degree at the same time in order to achieve optimum efficiency.

In other words the threshold of the first modification method and the threshold of the second modification method may be different though related and the effective "slopes" of each modification method may be the same or different.

As the motor speed increases the inertia of the motor also is helping smooth out the torque ripple and the circuitry could then concentrate on minimising the current ripple which is effectively harmonics which contribute losses to the drive and motor package.

Also, as the frequency of the input drive signal increases, the ratio of the actual currents of the higher harmonics to the fundamental current changes. T his change affects the amount of compensation required in order to achieve a net steady current

This method of torque ripple minimisation is intrinsically capable of being controlled by a self- adjusting mechanism. It is capable of operating at the same time as a so-called sweet spot_ control means is operating, so that both control methods operate together in order to achieve optimum efficiency, while also achieving optimum torque ripple reduction, which by default also acts to reduce distortion due to harmonic current .

The implementation of this drive concept is that there is a logical, layered approach to driving and controlling a motor. At a first level there is a desired speed at a given point in time. Next, there is a requirement to translate this into a voltage and frequency so as to achieve the desired speed when a load is applied. At the next level there is a requirement to optimise the voltage and frequency for sweet spot_ operation of the motor at the desired speed and load. At the same level as this, there is a requirement to optimise the voltage waveform shape in order to achieve maximum torque for the least losses and torque ripple.

P referred embodiments of the invention will now be described with reference to the F igures in which:

Brief Description of the Drawings F igure 1 illustrates a block diagram of a quasi-sine resonant drive;

F igure 2 illustrates a more detailed circuitry of power components of the quasi-resonant drive of F igure 1 ;

F igure 3 illustrates a basic control concept of how a quasi-sine waveform to a motor is modified in relation to motor speed;

F igure 4A illustrates a typical motor phase voltage for an unmodified quasi-sine voltage applied to the motor;

F igure 4B illustrates an example of a typical motor current for an unmodified quasi-sine voltage applied to the motor;

F igure 5A illustrates a typical motor phase voltage for a modified quasi-sine voltage applied to the motor at low speed;

F igure 5B illustrates a typical motor current for a modified quasi-sine voltage applied to the motor at low speed;

F igure 6A illustrates a typical motor phase voltage for a modified quasi-sine voltage applied to the motor at high speed;

F igure 6B illustrates a typical motor current for a modified quasi-sine voltage applied to the motor at high speed;

F igure 7 shows one phase of a waveform applied to a motor running at high speed with retarded turn on of a complementary switch;

F igure 8 shows one phase of a waveform applied to a motor running at high speed with minor complementary switch turn on retardation;

F igure 9 shows one phase of waveform applied to a motor running at high speed with complementary switch turn at ideal instant;

F igure 10 shows one phase of a waveform applied to a motor running at high speed with premature complementary switch turn on;

F igure 1 1 shows a block diagram of a quasi-sine motor drive;

F igure 12 is an overall view of a turn on circuit;

F igure 13 shows a circuit diagram of a starter isolation circuit for the self-adjusting drive circuit; F igure 14 shows an auxiliary gate driver output circuit in its low output state for the self- adjusting drive circuit;

F igure 15 is a circuit diagram of part of the self-adjusting drive circuit for enabling soft turn- on or hard turn-on of a driven switch;

F igure 16A shows an under-energised resonant waveform and block diagram of inputs required to enable oscillation.

F igure 1 6B is an overall diagrammatical representation showing a sequence of events that enables oscillation to occur;

F igures 17A to 17H show portions of a circuit diagram of a self-adjusting control circuit;

F igure 18 illustrates a sequence of events that enables oscillation to occur where output voltage is 50% or less of input voltage;

F igure 19 illustrates current excursions for operation of a control circuit that allows net current in or out of drive connections of a driven circuit;

F igure 20 is a table showing current and efficiency values for different output loads;

F igure 21 A shows a diagram indicating optimum loss with respect to slip of induction motor;

F igure 21 B shows a diagram indicating optimum loss with respect to advance angle for a permanent magnet (P M) or switched or variable reluctance (SVR ) motor;

F igure 22 is a diagram showing drive configured as a simulated inductor;

F igure 23 is a diagrammatical overall view of a whole motor system including: a drive module, a power drive system; and a motor system;

F igure 24 is a circuit diagram of a synchronous Buck converter;

F igure 25 is signal timing diagram for the synchronous Buck converter in F igure 24;

F igure 26 is a circuit diagram of a first embodiment of a switching supply including a feedback controller;

F igure 27 shows signal timing diagrams for the switching supply; F igure 28 is signal timing diagram for the start-up phase; F igure 29 is signal timing diagram for the start-up phase which indicates a prohibited or indeterminate condition which is over-ruled during a first start-up cycle;

F igure 30 shows an example of a current waveform from the PW M drive with line reactors;

F igure 31 shows in block diagram form, an example of a resonant voltage conversion circuit;

F igure 32 shows in block diagram form, an example of a resonant frequency conversion circuit;

F igure 33 shows in block diagram form, an example of a split function voltage control/frequency control quasi sine motor drive;

F igure 34 shows examples of graphs of power factor and crest control with split function drive for the circuit of F igure 33;

F igure 35 is an example of a three phase bi-directional (AC to DC or DC to AC) power supply;

F igure 36 shows an example of a functional diagram of a system including the motor drive of F igure 33 and the supply circuit of F igure 35;

F igure 37 is a graph showing ranges of power factor and crest control obtained using the system in Figure 36; and

F igures 38A to 38E are functional diagrams showing alternative system capabilities, handling energy flows, operating in different modes.

Detailed Description of the Drawings

F igure 1 illustrates a block diagram of a quasi-sine resonant drive. Here it is shown that the output part of the circuit consisting of the variable frequency stage, the slew rate capacitors and the motor itself forms a resonant circuit In order for the system to operate correctly a self-adjusting turn on of the appropriate switch is required which occurs in this quasi sine form of output. S ensors may be shown connected to the motor giving an indication of speed. T his can also give an indication of torque ripple if differentiated. Alternatively motor information can be calculated or derived from other measurable parameters. The variable voltage part of the circuit, shown at figure 1 , is typically also a resonant voltage conversion topology. By using these two techniques together, extremely high efficiencies can be obtained. F igure 2 illustrates a more detailed circuit showing power components of a quasi-resonant drive circuit. F igure 2 shows a three phase half bridge frequency determining circuit with slew rate capacitors C 6, C7 and C8 arranged in parallel with their outputs connected to the motor. The voltage amplitude of the generated waveforms at the output is determined by the variable voltage part of the circuit.

In operation, at the appropriate time determined by control circuitry (shown in F igure 1 ), one of the output drive transistors, Q3, (shown in F igure 2), is turned off quickly. The current that was flowing prior to switch off of Q3 transfers to charging or discharging slew rate capacitors C 6 and C8 until the voltage across switching device Q4 becomes reverse biased, at which instant diode D4 switches to conduct. Diode Q4 may be either intrinsic or external to the now reverse biased switching device.

C ontrol circuitry (shown in F igure 1 ), now turns on switch Q4, (shown in F igure 2) and maintains it on until it is switched off quickly. This repeats the resonant switching process. This same resonant process occurs on both of the other phases of the output; or as many phases that are appropriate for the motor/generator that is being controlled (F igure 2).

The operation of output circuit, the variable frequency circuit part of F igure 2, is essentially determined by a controller (figure 1 ) which acts to force outputs to go off at a predetermined instant. R eferring to F igure 2 switches Q3 to Q8 are switched on again by detecting the instant when the voltage across a switch is at zero potential, thereby ensuring no shoot through , currents can occur. T herefore switch on occurs with no voltage potential across a switch. T his ensures that there are no transient (voltage x current x dt) losses.

This type of operation, where the devices are turned off by the waveform frequency control mechanism (F igure 1 ) and turned back on again by the natural resonance, ensures that all component values and tolerances are automatically taken into account in order to derive optimum input parameters to drive a system (motor), for every switching transition that occurs. F urther, in one embodiment this can be achieved without the need for a microprocessor type hardware or software burden.

The variable voltage element shown in F igure 2 of the circuit includes switches Q1 and Q2 and associated other components which are also operated in a resonant mode. As configured the variable Voltage circuit provides a voltage step down function from the supply across C 1.

F igure 3 illustrates the basic control concept of how the quasi-sine waveform to the motor is modified in relation to motor speed. F igure 3 shows the speed of the motor going from stop to full speed. At low speeds, the amplitude of the quasi sine waveform is modulated by the voltage of the variable voltage stage which supplies the variable frequency stage. T his voltage variation is timed so as to effectively cause a reduction in torque ripple. The voltage variation information is either supplied by calculation from voltages and currents within the control section of the motor drive as shown in F igure 1 and/or supplied by a shaft speed sensor (shown in F igure 1 ) which is used to determine rotational position and/or speed of the motor itself.

The aforementioned method of reduction of torque ripple also effectively reduces motor losses due to current harmonics inherent in the application of a quasi-sine waveform. T his is because the instantaneous voltage modification of the voltage waveform has the effect of reducing the amplitude of harmonic currents as well as minimising the torque ripple. As the frequency applied to the motor increases, the effect of capacitors C 6, C7 and C8, (F igure 2) is to minimise the slew rate, and also modify negative effects of the quasi-sine waveform by making the voltage waveform have a definite slew rate. T his tends to drive the current waveform to be more sinusoidal.

There is also an opportunity to optimise the efficiency of an induction motor/drive combination by adjusting the applied voltage, frequency and slip of the motor to the sweet spot combination giving a given motor output power and speed for the least power supplied to the input of the drive. For an induction motor incorporating permanent magnets running at synchronous speed, as well as permanent magnet or switched/variable reluctance motors, the option of slip is not possible as the shaft frequency is the same as the drive frequency. However, it is possible to alter the advance angle with respect to the applied voltage. One way of achieving this is by altering the phase of the applied voltages relative to the motor rotor position with respect to stator poles, so that the conditions at which the so-called efficiency :sweet spofoccurs can be selected.

These aforementioned are methods of achieving quasi-sine performance almost to :pure " sine wave standard. They are not only suitable for induction motors but are also suitable for permanent magnet motors and switched/variable reluctance motors under certain conditions of use.

F igure 4A illustrates a typical motor phase voltage for an unmodified quasi-sine voltage applied to the motor. This is shown without the shunt slew rating capacitors fitted so the current waveform in F igure 4B is dictated entirely by the motor impedances. T he voltage applied to the motor is also constant during each segment of the switching waveform. F igure 4B illustrates a typical motor current for an unmodified quasi-sine voltage typical of F igure 4A applied to motor in F igure 1 . The relationship between a fundamental frequency and harmonics of the resultant current is dependent on many variables.

To minimise the current harmonics, so as to effectively minimise torque ripple and reduce resistive losses throughout the motor system as defined in F igure 23, several techniques can be used either on their own or concurrently. The voltage amplitude of the waveform itself can be modulated with a voltage waveform that effectively attempts to null the generation of harmonic currents.

S hunt slew rate capacitors C 6, C7, C8 in F igure 2 tend to modify transitions of the voltage waveform, thus the voltage waveform (from which the motor current waveform is derived) already has a reduced harmonic content and, in combination with the motor impedances at that speed and load, the resultant current harmonics are reduced further.

Also the harmonics of the motor current can be minimised if the control of the voltage of the waveform is made to simulate the characteristics of an inductor as shown for example in F igure 22. The net effect is to provide a low pass filter in combination with the slew rate capacitors and the motor impedances. Note that this effective voltage supply impedance capability is potentially fully adjustable to give the effect of a wattless resistance, a wattless inductance and/or a wattless capacitance. Wattless in this context implies that the circuitry is capable of simulating near perfect impedance. All these parameters may be varied dynamically and may exist concurrently. For example by measuring the actual power to the motor and/or the speed/change of speed of the motor, waveform modification can be performed continuously throughout each part of the applied waveform to minimise torque ripple and harmonic motor currents.

In a particularly preferred embodiment of the device its operation using pure sine waves would result in very efficient operation. However in practice, for an induction motor where there is asymmetry either in flux linkages (according to mechanical variations in relation to rotational position) or due to differences in a flux generating capability between each winding, there is the opportunity to compensate for these non-linear errors or other errors by waveform modification. Permanent magnet motors would be enhanced by this waveform modification capability and switched/variable reluctance motors even more so.

F igure 5A illustrates a typical motor phase voltage for a modified quasi-sine voltage applied to the motor at low speed. Here the voltage waveform is modified by varying the voltage of the variable voltage stage of the drive. T his voltage modification has the effect that when combined with the actual impedance of the motor, at the given speed and load, then the current drawn by the motor has a more benign waveform. This means that there are lower amplitude current harmonics in the motor. Voltage modification is relatively easy to achieve at low frequencies but becomes progressively more difficult to do at higher frequencies depending on the full power bandwidth of the variable voltage part of the drive and the maximum speed (frequency) of the drive itself.

F igure 5B illustrates a typical motor current for a modified quasi-sine voltage applied to the motor at low speed. Because the voltage applied to the motor in F igure 5A has a modified shape, the resultant motor current approximates to a sine wave or whatever shaped wave is required to obtain the desired motor current characteristics.

F igure 6A illustrates a typical motor phase voltage for a modified quasi-sine voltage applied to the motor at high speed. Here the effect of the slew rate capacitors can be used to slow the rate of voltage transition between the switching states of the frequency stage of the drive. In F igure 6A the voltage from the variable voltage stage is kept constant In practice it is possible to combine the effects of slew rate limiting and instantaneous voltage modification to obtain an optimum result of derived motor current. Note that the effective impedance of the variable voltage stage is important because it is loaded by the motor impedance in parallel with the capacitive impedance of the shunt slew rate capacitors. This is where giving the variable voltage stage an inductive impedance characteristic is of additional benefit.

F igure 6B illustrates a typical motor current for a modified quasi-sine voltage applied to the motor at high speed. T his shows how the actual motor current is starting to approach a wave shape with a very low harmonic content.

F igure 7 shows one phase of waveform applied to a motor running at relatively high speed with turn on using an opposite (complementary) switch for example Q4 in F igure 2 where the turn on signal to Q4 is too slow. F igures 7 to 10 show the importance and effect of correct timing of the turn on point of the opposite switch in relation to the turn off of the first switch. The F igures also show the slew rate clearly and, because the motor speed is fast, the opposite transition occurs and the cycle repeats itself. This sequence of events, of the transition from one voltage state to the other, is identical at different voltages, currents and frequencies. The sequence is also the same sequence that occurs in the variable voltage part of the circuit shown in F igure 2 as it operates to maintain a given output voltage. In F igure 7 in particular, the timing of switching of the opposite switch Q4 in F igure 2 is shown as having been delayed from switch on at the right time. F igures 7 to 10 show the effect of the resonance of the shunt capacitors C 6, C7, C8 in figure 2 during operation. C onsidering one of the 3 phase outputs to the motor in figure 2, when Q3 is turned off, the motor phase current is being maintained by a combination of the displacement current in C 6 and C8 and the forward conduction of the parallel diode D4 across the opposite switch Q4. When this current is reversed and flows into the motor and if switch Q4 is not closed then resonance occurs in the opposite direction of the voltage applied to the motor.

When the switch Q4 conducts either before D4 is in conduction or after the motor phase current has changed direction then there is a very rapid change of voltage across switch Q4 that occurs at the same time with a large current pulse (not shown) in switch Q4. T his current pulse can reach destructive levels if switch turn on time is very short and the switch impedance is low enough.

Even if when this potentially destructive switching is not a problem, the switching devices experience significant repetitive transient switching losses that are proportional to: volts x current x switc hing time. There are therefore significant issues with sharp edge of such voltage transitions with cable resonances, E MC radiation and dV/dt stress applied to motor windings.

F igure 8 shows one phase of waveform applied to a motor running at high speed with turn on of opposite switch, for example Q4 in F igure 2, very slightly too slow. As the opposite device Q4 is turned on closer to an optimum instant, undesirable voltage transitions become smaller (lower amplitude) with consequent smaller unwanted harmonics.

F igure 9 shows one phase of waveform applied to a motor running at high speed with turn on of opposite switch Q4 at an ideal instant The waveform is the ideal voltage waveform. It is important that the turning on of the opposite device Q4 occurs at some point when the motor current is still flowing through the forward conduction of the diode connected across the opposite device. Ideally if the switching device is also capable of conducting current in the reverse direction (for example a field effect device) then it is advantageous to turn the switching device on as soon after the forward conduction of the diode has taken place. T his is beneficial from a losses point of view if the value of (reverse current x device on resistance) is less than the voltage drop across the diode at this current level. Also switching in this manner allows for ease of optimising the On switching time of the opposite switch Q4.

F igure 10 shows one phase of waveform applied to a motor running at high speed with turn on of opposite switch Q4 very slightly too early before the resonance has forward biased D4. Here the opposite device has been switched on slightly in advance of the optimum turn on time. The resonance has not yet delivered the voltage to opposite device Q4 to drive it negative. When this occurs it gives rise to a high transient current in the opposite device Q4; causes excessive device switching losses: and is the source of problems associated with a fast edge, rather than the relatively smooth and slow edges associated with the resonant circuit operation. Note that the correct timing of the on switching event is not related directly to the frequency of the drive. T he correct time to turn the switch on is at instant shown in F igure 9.

F igure 1 1 shows optimisation of the operation of controlling power in or out of a synchronous or non-synchronous motor/generator/alternator in order to achieve maximum overall efficiency (least losses) of the combination of the drive and motor/generator/alternator consistent with other desired parameters. T he diagram in Figure 1 1 shows a quasi-sine motor drive. This shows the position of a self-adjusting switching device driver described as a self-triggering turn :on " circuit. In F igure 1 1 there are 3 motor phases so there are 6 switching devices shown as 1 to 6. E ach of these switches is controlled by 6 self-triggering turn on circuits which are more fully described with reference to the circuit in F igure 12. It is possible to drive switching devices 1 to 6 directly on and off by calculating switching criteria. However the self-triggering drive circuit described inherently compensates for turn on timing for each switching event and thereby automatically takes into account variables that would make a calculation based decision too complicated and therefore too time consuming to perform. T hese variables include: coil, motor, shunt/resonance capacitor, speed, load, voltage, current temperature or any combination thereof.

Where the individual switching device is shown, there may in fact be several devices in parallel. Under these conditions it may be possible to have (within the switching device drive circuit) one part that detects the instant to switch on the devices and one or more driver circuits, for example one driver circuit for each switch in a parallel arrangement F urthermore some of the drive circuits need to be floating while others have a common connection and so in some configurations it may be possible to employ circuit redundancy and so save components, cost and weight Also an overall control microprocessor identified as : = " may optionally be referenced to the low voltage common terminal connecting switches 2, 4 and 6 of the power circuitry thus eliminating a significant amount of unnecessary signal isolating components.

F igure 12 is an example of a reset circuit of the type that may be used in the circuit detailed in F igure 1 1. An important feature is the bi-stable element U1 a. A reset on pin 4 under normal running conditions overrides any status of the switching device itself. The wiring and polarity of the connection to the reset opto-coupler U6 is failsafe. T he voltage detecting circuit for the drain/collector ideally has a variable impedance. The advantage of this is for the detection circuit to present a very low impedance to the switching device drain/collector while diode D8 is reverse biased. T his eliminates the possibility of high frequency noise leaking through the reverse biased diode and causing a false zero volt detection to occur. This low impedance can only be overcome when the diode is properly forward biased which can only occur when the voltage across the switching device is about zero volts. T he circuit itself operates at low voltage except for the cathode of diode D8.

F igure 13, F igure 14 and F igu re 15 show detailed views of the starter circuit used in F igure 12. The way these work is that in mode a (as described below), gate of associated switching transistor is turned on slowly so that a current spike (from charging or discharging shunt (C 6, C7, C8 in F igure 2 for example) or other resonant capacitors) does not cause a significant current spike in the associated switching device of such an amplitude that it stresses or in a worst case destroys the associated switching device. Actual one shot energy loss here is not detrimental to the associated switching device. With motors, all three phases can be started separately at reduced voltage (and at the same output voltage). Different conditions apply for quasi sine and pure sine drives.

The starter circuit in F igure 13 is operable even if the voltage conditions across the device are considered inappropriate (as shown in F igure 29) for normal operation of the turn on circuit as shown in F igure 12. Care must be taken to ensure that inappropriate operation of this circuit cannot occur.

F igures 14 and F igure 1 5 are detailed views of a power transistor drive circuit used in F igure 12. In this particular implementation, the circuitry in F igure 12 is capable of operating two independent power switching transistors. The circuits in F igures 14 and Figure 15 have the capability of either mode a: soft high, or mode b: hard high, operation. In both cases F igures 14 and F igure 15 have a hard/low capability.

In the circuit of F igure 14, the switch driver U5 has two outputs. One output is connected to pin 6 and pulls current out of the associated switching device to turn it off, thereby effectively driving the gate/base low. This output has a very low impedance and thus switches the associated switch very quickly, typically within around a few 10s of nanoseconds. High output from pin 7 is effectively off so no positive current can flow through R 5 or R 6.

For stability and control reasons it may be beneficial for the soft turn on, mode a, to only use one transistor in an output switch consisting of multiple parallel connected power devices. In this implementation both the circuits shown in F igure 14 and F igure 15 are capable of doing this. A simple logical modification allows only the circuit in F igure 1 5 to have a soft turn on mode a.

F igure 1 5 in mode a operation is a detailed view of a power transistor drive circuit used in F igure 12 with particular attention being paid to its soft turn on capability when there is a high voltage present across the device being switched on. This part of the circuit is used for the initial starting phase of resonant operation. A problem it overcomes is how to start a resonance system that has no inherent mechanism to do this, as turn on pulses are generated by the action of resonance itself once resonance has been established. Therefore simply enabling the transistors does not switch them on as none of the switches Q3 to Q8 (F igure 2) are unlikely to be sitting in a suitable quiescent state with no voltage across them.

Under these conditions, the voltage of the switching transistor is unknown and so the zero voltage detecting circuit is inhibited. When the soft start input is enabled, mode a operation, there are two switches in a totem pole like output configuration. The other switching device in the totem pole is turned off so there is no possibility of a shoot through condition occurring. D4 inhibits a so-called :strong pull up " T his leaves R 20 to limit the input current into the combined capacitance of both the input capacitance and the Miller or reverse transfer capacitance of the switching device as it turns on.

To start the three phase quasi-sine system it may be necessary to initialise the system and set it up for commutation by connecting one phase of the motor to the positive rail and the other two phases to the negative rail in order to inject current into the motor to enable resonant commutation to commence once the appropriate :off " pulses are initiated. For the quasi sine implementation, for minimum components it is convenient to turn on one of the pull up output transistors as they tend to be at a high voltage potential and so require isolated drive capability. T he other two legs of the 3 phase half bridge are switched to the common negative rail and therefore do not require extra isolation components.

F igure 1 5 in mode b operation, is a detailed view of a power transistor drive circuit used in F igure 12 with particular attention being paid to its hard (fast) turn on capability when there is a negligible voltage present across the device being switched on. Here pull up transistor Q3 is enabled, D4 is reverse biased, and R 1 1 is switched high so a strong turn on current to the switching device is provided via R 17. This is the normal turn on mechanism that is enabled by the voltage across an appropriate switching device reaching zero volts. This soft or hard turn on option is required for both the circuitry involved in driving and controlling the variable voltage stage Q1 and Q2 in F igure 2 as well as the circuitry involved in driving and controlling the variable frequency stage Q3 to Q8 also depicted in F igure 2.

F igures 16A and 1 6B depicts diagrammatically a sequence of events that enables oscillation to occur. When the circuit is at rest, all switching devices have their resets enabled. To start the resonant circuit it is initially required to generate pulses of a suitable duration and apply them to the appropriate switching devices while other switching devices not required for the initialising process are still held in their reset conditions. This tends to charge up inductors in the circuit with sufficient current to enable a positive voltage rail to negative rail excursion to be able to occur with the associated resonant capacitors shunted across the switching devices. At this moment the opposite switches have to be enabled so that when the original switching devices are turned off, voltage detection circuitry operates correctly by detecting a very near zero state and turn the opposite switching device on. F rom this point circuits (shown for example in F igures 2 and 17A and 17B) continue to resonate. The opportunity to allow for the turn on time of the drive circuit can be allowed for by triggering its inception at a voltage point in advance so allowing for delays.

The strategy adopted is always to be turning off the appropriate devices when a target current is achieved. T his is decided by the control system shown in F igures 17A and 17B. The fact that devices are resonating gets it turned on again.

This method of commutation can be controlled by software. In such an embodiment there is little chance of :shoot through " caused by uncertainty of device switching speeds and tolerances. Therefore this method of commutation eliminates all overlap and dead band timing issues that conventional switching systems suffer from.

Because of the way the resonant circuit (in F igure 16B) operates, any stray or inherent capacitance of the switching devices, motor, cable or inductors or any other components connected to node, in this case the junction of the common connection between Qt and Qb in Figure 16B that is being switched, is in parallel with an additional capacitance component required to make the circuit function correctly. A normal switching topology finds these stray and inherent capacitances to be significantly detrimental to idealised operation and so introduces a significant power loss as well as circulating currents and E MC issues.

F igure 16A shows an under energised resonant waveform and block diagram of inputs required to enable oscillation. It is a requirement for correct operation of the resonant circuit shown in F igure 1 6B that at all times there is sufficient stored energy in the Inductance shown in F igure 1 6B to ensure correct rail to rail commutation. F igure 1 6B shows the power stage that is controlled by the control circuit Figure 17A to 17H.

F igure 17 shows a circuit diagram of self-adjusting voltage control circuit T his is used in the variable voltage section as shown in F igure 2. In order to derive the desired voltage, variable volts output from the circuit in F igure 2, the control circuit (shown in F igures 17A to 17H) compares an output voltage with the required target voltage shown in F igure 17A. F rom this it ensures that off pulses, applied to the two switching devices Q1 and Q2, (shown in F igure 2) in order to maintain the output voltage at a desired level.

The circuit shown in F igure 17A and 17B is analogue but it could be converted partly or completely to a digital domain if required. The fundamental aspects of operation would be unchanged. In F igure 2, the variable voltage supply output is capable of operation from one voltage rail to the other and has a full power bandwidth of several kHz in this configuration. The full power bandwidth can be increased to many kHz. T he resonant operation used has no inherent high frequency limitation. T he high frequency range is limited primarily by turn off speed of the switching devices.

The switching devices have to turn off completely, within a few percent of their rise time, which is dictated by slew rate capacitance and operating current S witch off times slower than this tend to waste power in the switching devices as they have to handle a repetitive switching loss where there is both voltage and current present for a period of time in the switching device. T he resonant operation overcomes this under normal conditions, effectively by bypassing the current that is present as the device turns off, into becoming the charging or displacement current of the resonant shunt capacitors both deliberate and parasitic.

The circuit in F igure 17A to 17H has several important features and functions. Controlling a resonant circuit so that it always resonates under all conditions of applied input power voltage, desired power output voltage and desired output current requires a radically different kind of control strategy. This is especially so if extremely high levels of conversion efficiency are to be achieved.

Loop gain stability under all conditions has been one of the most difficult issues to control. This is particularly so where a high full power bandwidth is required as near to critical damping as possible whilst still maintaining operation of a resonant circuit.

Assuming that the desired target voltage is presented to the circuit (in F igure 17A) as a 0 to 5 volt value with a midpoint of 2.5 volts. Knowing what the power input mean voltage value is, then the centre point of the voltage output (which is half the voltage input) can be set by adjusting an 8 bit attenuator pad U4 and U13. Any error between the attenuated output voltage and the target input voltage is developed as an error signal from the differential amplifier U10b as shown in F igure 18A. This error is developed across C 6 after modification for loop gain and the response time by the variable gain elements controlled by U14 a, b and c. T his error voltage is amplified by amplifier U7a which nominally sits at 2.5 volts if the input and attenuated output voltages are identical. Any deviation from this tends to cause the voltage at U7a to vary from 0 to 5.0 volts.

It is important to consider the idling state of variable voltage resonant circuit shown in F igure 2 while it is running at a particular voltage output but where no net current is being drawn from its output terminal. T he control circuit in F igure 17A and 17B gives an output voltage that is exactly equivalent to the current flowing in the coils of the output inductor L2a,b in F igure 2. The circuit shown in F igure 17G is discussed in greater detail below. Under these conditions the timing of the off pulses to the switching devices Q1 and Q2 is arranged so that the current in the inductor builds up to a certain positive level at which point outputs from circuit U3a and b in F igure 17H toggle and coil current drops to zero and then increases to an equal and opposite value to the current on the previous half cycle.

At the corresponding negative point the outputs of U3 a and b again toggle and the coil current in L2a,b in F igure 2 becomes less negative, crosses zero and increases to its original positive value again. This cycle then repeats. Any minor errors in currents and timing result in the variable volts output voltage drifting up or down and the voltage discrepancy causes the off times of each switching device Q1 and Q2 to be altered slightly. T his tends to force the variable volts output voltage to its correct value. T his continual oscillation and shuttling of current back and forth has sometimes been considered wasteful but the inherent losses are so small in this kind of resonant topology. Even with relatively small output powers, in relation to full power capability, the overall efficiency is extremely high. T he offset circuit comprises two comparators U3a and U3b in F igure 17H which compare two adjustable voltages so that when power is required, a feedback controller U7a offsets the voltages by a predetermined amount in order to derive more/less power which is proportional to the offset.

Because of the unusual topology and the control strategy adopted the variable volts output circuit shown in F igure 2 operates in all four quadrants. In the circuit in F igures 18A and 18B, a careful analysis of the voltage outputs of U5a and b, U7a and b, and the networks on pins 2, 3, 5 and 6 on comparators U3a and U3b identify that the outputs 1 and 7 of U3 provide the correct off pulses when required. F igure 18 depicts the sequence of events that enables oscillation to occur where output voltage is 50% or less of input voltage. A particular problem that has to be overcome in this resonant topology is that when current flows from the output, say the variable volts output in F igure 2 and the output voltage is at about 50% or less of V ma x, where V ma x is the voltage at A, there is required an injection of negative current (I re v) introduced into the resonant inductor L2a,b for resonant commutation to occur. W ithout this negative current there is not enough energy to resonate shunt capacitors C4 and C 5 so that the opposite switching device is reverse biased sufficiently to trigger the on pulse and ensure lossless commutation to continue.

This negative current I re v needs to be increased as the output voltage decreases. This negative current is derived from the specific operation of amplifier U5a and depends on the output polarity of U7b and the network values at input of comparator U3. The configuration in F igure 17A to 17B also allows for normal operation where output voltage is 50% or higher and the current flows into the output terminal.

F igure 19 shows the coil L2a,b current excursions for operation of the control circuit F igure 17A and 17B for allowing net current in or out of variable voltage output connections in F igure 2. When the variable voltage circuit in Figure 2 is in its resonant idling mode, the current flowing into and out of resonant inductor L2a,b is equal and opposite, thus giving no net current flow either into or out of the variable volts output terminal. As current is drawn from the variable volts output terminal, the output voltage tends to fall and feedback circuit U10b, U7a and associated components acts to offset the switching points at turn off for comparators U3a and U3b. In turn these results in a higher value of positive current, and a lower value of negative current, flowing thus giving the desired net current outflow. Initially the control circuit in F igure 17A and 17B, attempts to maintain the same overall switching frequency, typically up to the point that the coil current doubles in the positive direction and drops to zero on the negative phase of the cycle.

If more current is required then the positive current increases to its maximum of, say 4 times peak idle current, while still maintaining its minimum current at zero. Consequently when more power is required it is necessary to reduce the input frequency of this system. This is helpful as the coil losses increase due to the higher currents but are reduced due to the lower frequency of operation.

As the circuit operates in all four quadrants, for full current in the negative direction the triangular wave is displaced below the zero current line. F igure 20 shows the current and efficiency calculations for the level of loading on an output. F igure 20 shows how this unusual effect of efficiency versus loading characteristics that this resonant topology achieves. This efficiency is aided by altering the internal current ramp offset and the frequency change under load to achieve the efficiency range.

F igures 21A and 21 B show graphs resulting from calculations relating to losses and operational voltages in order to highlight the operation of seeking the sweet spot of optimum voltages, frequencies and phasing in order to derive a user specified shaft power from motor shown in F igure 1 for the least power drawn from the supply shown as input in F igure 1.

F igure 21 A is a typical sweet spot graph for an induction motor where voltage, frequency and slip are plotted against total motor system loss for a given motor speed and load. F igure 21 A shows clearly there is a particular combination of reduced volts, increased frequency and hence increased slip giving an optimisation opportunity.

F igure 21 B is a typical sweet spot graph for a permanent magnet motor or variable reluctance motor where voltage and advance angle are plotted against total motor system loss for a given motor speed and load. F igure 21 B shows clearly there is a particular combination of reduced volts and increased advance angle so as to provide optimised input drive criteria.

F igure 22 shows a feedback approach for a drive using a simulated inductor, which in combination with the slew rate determining capacitors, forms a low pass filter so as to reduce harmonic currents and torque ripple. T his kind of approach has advantages in not requiring any significant software or hardware burden to turn the quasi sine wave form into a near sinewave at all frequencies. T he slew rate capacitors C4 and C 5 in Figure 2 are chosen to provide an acceptable level of dV/dt which may not be enough to convert the quasi sine to a good sine wave approximation. This is where configuring the output impedance to appear like an inductor has a very important function as the actual inductance value can be made very large at low speeds and frequencies so that the low pass corner point of this LC combination is matched to the speed. T his allows a relatively small capacitance to be used to provide correct quasi sine to sine modification over the whole operating speed and frequency range of the motor drive.

F igure 23 In order to understand how a motor drive system is considered, convention has arranged boundaries for the motor in context with the power connection to supply the power for it. F igure 23 shows the boundaries of a complete drive module (C DM), a power drive system (P DS ) and a motor system comprising the motor itself and the attached mechanical load. This is included as a requirement of " C E Marking and Technical Standardisation Guidelines , for application to electrical power drive systems. The relevance here is that the overall efficiency of the techniques described is to be read and understood in the context of the :motor systenrfin this guide.

It is recognised that further development of an existing pulse width modulator (PWM) drive for motors, which already encounters and creates significant technical obstacles, results in even greater problems to be overcome in order to get it all to work correctly and these further developments may have other undesirable effects as well. In order to introduce the advantages of newer transistor materials, such as silicon carbide (SiC) and gallium nitride (GaN) switching speeds are increasing and associated switching edges are becoming sharper. This more rapid switching imposes greater constraints on design and requires drives to be more complex, mainly due to greater parasitic impedances; as well as subjecting the motor to even more aggressive waveforms than existing ones (that already cause considerable problems in motor design and installation) as a consequence of EMC.

By adopting a drive based on the fundamental principles outlined herein it is possible to revert to lower cost motor materials and also materials that give superior performance as they are only subjected to a fundamental frequency. Motor design is intended to ensure the motor runs on its fundamental frequency without having to compromise its design to cope with the issues of pulse width modulation. Improved design also allows the use of lower quality (and therefore cheaper components) and switched or variable reluctance motors (which would allow for the fundamentally cheaper and physically toughest motor design that switched or variable reluctance motors offer compared to induction or permanent magnet motors) as existing torque ripple problems are overcome.

Figure 24 shows an example of a synchronous Buck converter which comprises a power switch illustrated by transistor Q1 and an auxiliary switch illustrated by transistor Q2. A DC supply provides a constant voltage Vin. Output stage consists of an inductor shown as coil L and an output capacitor C4 in series. A load impedance, Zi oa d, is connected in parallel with the output capacitor C4. The junction between Vin positive and the power switch Q1 is referred to herein as the top rail. The voltage of the top rail is Vin. J unction at the output to the auxiliary switch Q2 and the negative of Vin is referred to herein as the bottom rail. The voltage of the bottom rail is ground in many, but not all, applications. For the purposes of the present embodiment the voltage of the bottom rail is zero.

Referring again to Figure 24, the mutual junction of switch Q1, switch Q2, and coil L is designated junction Q and the voltage at this junction is VQ. The junction of coil L and output capacitor C4 and load impedance Zload is designated the output junction. The voltage at this junction is designated Vout The current passing from junction Q through coil L to the output junction is designated IL.

C onnected in parallel across switches Q1 and Q2 are protection diodes D1 and D2. P rotection diode D1 is in parallel with switch Q1 and protection diode D2 is in parallel with switch Q2. P rotection diode D1 is arranged to block current if the voltage at the top rail is higher than the voltage at junction Q. C urrent only flows through diode D1 if the output voltage VQ is greater than Vin + D1 diode forward voltage drop across Q1 .

P rotection diode D2 is arranged to block current if the voltage at junction Q is higher than the voltage of the bottom rail. C urrent only flows through diode D2 if VQ is less than the bottom rail voltage less the D2 diode forward voltage drop across Q2.

As illustrated in F igures 24 to 28 inclusive, the current IL flowing through the inductor L is considered positive when it flows from junction Q to the output junction. T hat is inductor current IL is said to be forward " when it is flowing from junction Q to the output junction. T he current IL flowing through the inductor L is considered negative when it flows from the output junction Q to junction Q. That is inductor current IL is said to be :reversed " when it is flowing from the output junction to junction Q. If the inductor current IL is said to be increasing positively, it means that its magnitude is increasing while it is flowing forwa rd. If the inductor current IL is said to be " increasing negatively . , it means that its magnitude is increasing while it is flowing reversed.

F igure 25 shows a signal timing diagram for the synchronous Buck converter. It shows the way that voltages and currents change in this circuit over time. Using F igure 24 for reference, initially the voltage VQ and Vout are zero; the top rail voltage is Vin; the bottom rail voltage is zero; current IL is zero; and switches Q1 and Q2 are both off. In the first mode the power switch Q1 is turned on and the auxiliary switch Q2 is off. T hen voltage VQ is equal to the top rail voltage Vin. If switch Q1 is a transistor, then voltage VQ is not exactly equal to Vin due to semiconductor effects. T he current IL, through the inductor, rises. This rising current charges the output capacitor C4. The voltage V ou t rises. Upon reaching an upper desired level for IL, power switch Q1 is turned off and auxiliary switch Q2 is turned on.

In the second mode the power switch Q1 is off and auxiliary switch Q2 is switched on. Voltage VQ is equal to the bottom rail voltage which is zero. If switch Q2 is a transistor, then voltage VQ is not exactly equal to zero due to semiconductor effects. The current IL through the inductor falls because the voltage Vout is higher than VQ. Although the current IL through the inductor is falling, it is still flowing into output capacitor C4 through output junction. Therefore the voltage on the capacitor C4 continues to rise initially. However if auxiliary switch Q2 is left on long enough, the current through the inductor L eventually drops to zero. T herefore the voltage at the output junction Vout keeps rising until the current through the inductor L reaches zero, at which instant voltage Vout stops rising.

If continuous operation of the circuit in F igure 24 is required, it is important that the coil current is not allowed to fall to zero, and under these conditions auxiliary transistor Q2 is turned off and Q1 is switched on again while current is flowing through the coil L, thereby enabling the cycle to repeat. Note that this means there are problems associated with this such as reverse recovery losses in D2 and switching losses in Q1 due to the simultaneous presence of voltage and current in Q 1 as Q 1 is switched.

If discontinuous operation of the circuit in F igure 24 is required, the coil current is allowed to fall to zero; at which point in time the auxiliary transistor Q2 is turned off and transistor Q1 is turned on thereby enabling the process to repeat The first mode is then repeated with the power switch Q 1 on and auxiliary switch Q2 switched off.

By continuous repeated operation of the first and second mode of operation the output voltage Vout rises to the desired voltage and is maintained around the desired voltage by the controller in F igure 24 adjusting the drive timing to transistors Q1 and Q2 on and off thereby effectively adjusting the inductor current value IL.

An example of a prior art drive circuit is described by Panda, Pattnaik, and Mohapatra in the International J ournal of Power Management E lectronics, Volume 2008, Article ID 862510, in the article entitled " A Novel S oft-S witching Synchronous Buck C onverter for P ortable Applications , . S uch prior art switching converters suffered from: auxiliary switches being turned off whilst they conducted current This resulted in switching losses and E MI. The power switch that is described with reference to F igure 24 and is one of the preferred embodiments described herein. It operates with higher peak current stress and more circulating current as well as active and passive circuits that are more complex than existing power circuits.

Although developments in switch mode supplies have resulted in designs of considerable ingenuity, they normally suffered from increased complexity, cost or exotic components.

F igure 26 shows an embodiment of the switching supply in addition to the elements and connections of the synchronous Buck controller. The circuit also comprises a first switch capacitor C 1 connected in parallel across the terminals of the first switch Q1 ; a second switch capacitor C2 connected in parallel across the terminals of the second switch Q2; and a rail capacitor C3 connected between the top rail and the bottom rail.

The switching supply also comprises a feedback controller. The feedback controller receives inputs. The switching supply sends a control output, that is based on the values and timing of the inputs, which turns the switch Q1 on or off or and sends a control output signal which turns the switch Q2 on or off.

R eferring to F igure 26, for convenience, let C 1 be zero and C2 have a value required for correct resonance of L. The effect of C 2 appears across Q1 due to the series connection of C3 to C2. In a preferred first mode the power switch Q1 is turned on :s oftly " That is power switch Q1 is partially opened to let current slowly seep through at a rate of typically a small fraction of the rated current of Q1. Note that consideration of the second breakdown characteristics of Q1 need to be allowed for during this slow turn on transition. If Q1 is a transistor, turning it on softly means that its resistance is gradually decreased. T he advantage of the soft start is low in-rush currents and less stress on switch Q1 . It can be seen that Q I has to provide a charging current for C2 to charge from zero volts to the top rail voltage. A fast turn on here may lead to a potentially destructive high peak current in switch Q1 and this circuit arrangement prevents this from occurring. Note that the transient heat dissipation that occurs in this relatively inefficient switching action is not an issue as it ideally only occurs once with subsequent switching transitions being in a much more efficient mode.

R eferring again to F igure 26, after the power switch Q1 is turned on, capacitor C 2 is charged to the top rail voltage Vin almost immediately and voltage VQ is equal to the top rail voltage Vin. If switch Q1 is a transistor, then voltage VQ may be just slightly less than Vin due to semiconductor effects.

The circuit in F igure 26 is now described in its second mode of operation. C urrent IL through the inductor rises. This rising current charges the output capacitor C4. The voltage Vout rises. T he near step increase in voltage at VQ at the start of the first mode causes the output voltage Vout to rise.

The shape of the wave forms over time, including voltage VQ, voltage Vout, and current IL are shown in the signal timing diagram of F igure 27. Upon the first to occur of either of the following events power switch Q1 is turned off. T he first event is the current through the inductor rises to a predetermined maximum, ILmax. T he second event is an upper desired level for Vout is reached.

The maximum current in inductor L (ILmax) is limited by magnetic saturation, overheating of the inductor L, exceeding the peak current rating of Q1 or any other limiting parameter chosen. The s econd mode ends and the third mode begins when power switch Q1 is tu rned off. P referably Q1 is turned off quickly. When this occurs Q1 is turned off and the resistance of switch Q 1 increases quickly. At this instant inductor current IL, that was flowing through Q 1 , is transferred to flow through capacitor C2.

In the third mode the power switch Q1 is off and the auxiliary switch Q2 is als o off.

At the beginning of the third mode the inductor current IL continues to flow which draws down the voltage VQ by draining charge off capacitor C2. Voltage VQ decreases according the relation between voltage and a resonating series circuit of the inductor L and capacitors C2 and C4. An advantage of drawing charge from capacitor C2 is that there is no resistive power loss. If this function were to be provided by the turn off of Q 1 , in the usual manner, the simultaneous application of voltage across and current through the switching device would result in a substantial power loss only limited by the speed of the switching event itself.

When the voltage VQ decreases to a relatively small level, below the bottom rail voltage, the protection diode D2 in switch Q2 is suddenly forward biased. This small relatively level is about 0.7 V and depends on the particular specification of diode D2. T herefore the voltage at VQ drops to a minimum voltage of about -0.7 V and can fall no further. Detection of this predetermined minimum level of voltage VQ is a criterion for turning Q2 on.

The action of the circuitry at the end of mode 2 and during mode 3 has therefore effected a lossless transition of VQ from the top rail voltage to the bottom rail voltage with a waveform shape dictated by the resonant values of C2, L2 and C4, and by the rail voltage and coil current at the moment of switching. Switching losses are substantially reduced and are limited to losses in the equivalent series resistances (E S R) of the components involved. Radio frequency interference is considerably reduced due to the lower dV/dt of the switching edge. All stray and parasitic capacitances in the circuit are additive to the effect of the shunt capacitance C2. T his means that any stray capacitance that is effectively connected to the node at Vq such as the capacitance of Q1 in its off state for example.

The third mode ends and the fourth mode begins when auxiliary switch Q2 is turned on. At this time Q1 is off and Q2 is on.

Because the voltage VQ is about zero volts, which is less than the output voltage, Vout the current IL through the inductor L continues to decrease. Depending on the output voltage Vout, which is the voltage on capacitor C out, switch Q2 stays on until either of the two criteria a) or b) below occurs. a) The point in time where the inductor current IL reaches zero and when the output voltage Vout is in the range of being greater than or equal to half the top rail voltage Vin.

In practice, to allow for resonance losses, Vout needs to be slightly greater than half the top rail voltage Vin to allow a successful rail to rail resonance to occur. b) When the output voltage Vout is in the range of less than half the top rail voltage Vin, to just slightly greater than half the top rail voltage Vin, the switching behaviour of Q2 is modified. In order to route enough energy into C2 so as to commutate VQ from the bottom rail to the top rail, it is necessary to inject energy into the inductor L to achieve this.

By allowing switch Q2 to stay on past the point in time where IL drops to zero, the inductor current IL reverses and increases to a predetermined negative value. T he stored energy in the inductor begins to increase again. This is the extra energy required to commutate C2 from the bottom rail to the top rail.

At the beginning of the next mode, which is the fifth mode, switch Q2 is turned off quickly. The advantage of applying criterion a or b to the turn off time of Q2 is that some of the additional energy stored in the inductor L is available to be transferred to capacitor C 2 when switch Q2 is turned off. In many cases this additional energy is sufficient to eventually raise the voltage VQ to the value of the top rail voltage a certain amount of time after switch Q2 is turned off.

By this additional delay in turning off switch Q2, a stronger reversal of current is achieved through the inductor than if switch Q2 is turned off immediately upon the current in the inductor reaching zero. This stronger reversal of current through the inductor L causes additional energy to be stored in the inductor.

Advantageously some of the current that flows through the inductor when the value of the current is negative may be drawn from not just capacitor C4 but also a load connected to the output

The fourth mode ends and the fifth mode begins when switc h Q2 is turned off. Du ring mode five switc h Q1 is off and switc h Q2 is off.

Still referring to F igure 27 the waveform is that of a damped sinusoid according to an equation corresponding to the series combination of the inductor L and the capacitor C4 and capacitor C2. P referably the intrinsic resistance of these components is low enough for a waveform to be that of an under damped sinusoid. Due the nature of the series LC circuit resonance, the current flowing through the inductor L continues to increase negatively, at the beginning of mode 5 because the voltage VQ is about zero volts, which is less than the output voltage Vout. This adds to the energy already stored in inductor L at the beginning of mode 5 by the negative pre-charge current already flowing.

S ince the current IL flowing through the inductor L is zero or negative at the start of mode four depending on whether criteria a) or b) is used to switch off Q2 at the end of mode 4, the current IL flowing through the inductor is negative immediately after mode 5 starts. T his negative " reversed , current IL charges capacitor C2 and raises the voltage VQ.

If criterion a) in mode 4 triggers switch Q2 off, the voltage VQ eventually rises to the top rail voltage Vin plus an additional small voltage that is enough to forward bias protection power diode D1 . This additional small voltage is about 0.7 V above the top rail voltage depending on the particular diode D1. T herefore the voltage VQ is limited to rising to the top rail voltage plus this additional small voltage.

This aspect of the invention therefore detects when protection power diode D1 becomes forward biased. By turning Q1 on fast at this time there is a very low switching loss since voltage drop across power switch Q1 is less than the power diode D1 voltage drop. This is the beginning of mode 2 again.

If criterion b) in mode 4 triggers switch Q2 off, the voltage VQ may or may not eventually rise to the top rail voltage Vin in addition to the additional small voltage which is sufficient to forward bias protection power diode D1 .

If voltage VQ does reach the top rail voltage in addition to the forward voltage drop of the protection power diode D1 , then the circuit in Figure 28 detects the peak of the resonance of the voltage QV and when this occurs it turns switch Q 1 softly on at this instant

It is possible that the voltage VQ peaks below the top rail voltage Vin, depending on such factors as: the value of L, the value of C 2 and C4, the amount of delay imposed by criterion b), the energy present in the inductor L when Q2 is switched off, the relative values of Vout and the top rail voltage, and the current drawn by any load connected to the output. T he circuit in F igure 1 6A detects if voltage VQ peaks below the top rail voltage plus the forward voltage drop of power protection diode D1 and turns switch Q1 on at this time. Advantageously this is when the voltage drop across switch Q1 is minimized and therefore the switching power loss (and R FI) are also minimized at this time. P referably to further minimize any switching loss and R FI, if the voltage VQ peaks below the top rail voltage in addition to the forward voltage drop of diode D1 , switch Q1 is turned on softly _. In this event the resistance across switch Q1 is reduced gradually. When the voltage VQ rises to the top rail voltage, switch Q1 is then fully turned on fast.

If there is voltage undershoot of the rail target voltage, the circuit (shown in F igu re 1 6A) can vary the pre-charge current in the inductor L by increasing the current slightly so as to ensure sufficient energy is available from the inductor to achieve correct commutation for the next cycle. T his active monitoring of the resonant voltage at mode 5 allows for the control circuitry in F igure 16A to adjust the reverse or pre-charge current in the inductor L to be just enough or in excess of what is required to ensure rail to rail commutation.

At the end of the fifth mode switch Q1 is on and Q2 is off. Then the cycling process is repeated beginning with the second mode.

R eferring to F igure 26, input capacitor C3 connects the top rail to the bottom rail, has a much larger value than the switch shunt capacitor(s) C 1 or C2. T he choice of how to split the capacitors and capacitance values made in order to minimize circulating R FI currents due to the transfer of inductor current from the transistors Q1 , Q2 to the capacitors C 1 and C2 and back again during each switching transient

A single capacitor C 1 could be connected across Q1 as the highest diverted current normally occurs here.

F igure 27 is a signal timing diagram for the switching supply when the system is running.

F igure 28 is a signal timing diagram for the switching supply when the system is initiating its startup phase.

F igure 29 shows an under-energized resonant waveform and block diagram of inputs required to enable oscillation. The diagram illustrates the situation that occurs during the start-up phase when a prohibited or indeterminate condition is over-ruled for a first start-up cycle in order to commence oscillation.

F igure 30 shows another example of a conventional PW M drive with line reactors which reduce but does not eliminate input current wave-shape problems.

F igure 31 shows an example of a high efficiency resonant converter device configured for voltage conversion. The diagrams in F igure 31 show a high efficiency resonant converter circuit and its main power conversion components. In addition to components shown it is understood that an electronic drive circuit as well as control and auxiliary power components are required to enable the circuit to operate. Due to the symmetrical nature of the circuit (F igure 31 ) it can be operated in all four quadrants if required. It is appreciated that the circuit can operate in four main modes.

Step down

Here the DC voltage is applied between D and C where D is the more positive terminal. The operation of the switching devices, depicted as NP N transistors, in a resonant mode allows a voltage between zero and the voltage applied at D to be available at terminal A.

Step up

Here the DC voltage is applied between A and C, where A is the more positive terminal. T he operation of the switching devices, depicted as NP N transistors, in a resonant mode allow a voltage between the voltage applied at A and a voltage higher than A depending on the operating regime of the resonant circuit to be available at terminal D.

DC to AC conversion

Here the DC voltage is applied between D and C where D is the more positive terminal. If the load connected to A has its other connection connected to the midpoint of the voltage between C and D, then the operation of the switching devices, depicted as NP N transistors, in a resonant mode allows the voltage at A to be taken above or below the midpoint voltage and this impresses an AC waveform on this load with a maximum amplitude swing between zero and the voltage applied at D.

AC to DC conversion

Here the AC voltage is applied between A and returned to a point between C and a value that is equal to the peak to peak value of the AC signal present on A, where A is always the more positive terminal relative to C. T he load is connected between C and D. T he operation of the switching devices, depicted as NP N transistors, in a resonant mode allows the voltage at A to be taken above or below the midpoint voltage and this is converted to a DC voltage between C and D.

F igure 32 shows an example of a resonant frequency conversion block. This is a block diagram of a standard resonant frequency conversion block and shows its main power conversion components, including the resonant dV/dt limiting capacitors and a 3-phase motor connected. It is appreciated that ancillary electronic drive circuit control and auxiliary power components required to make the circuit operate correctly are not depicted. Due to the symmetrical nature the circuit shown in F igure 32 it can be operated in all four quadrants if required.

F igure 33 shows a split function voltage control/frequency control circuit for a quasi-sine motor drive. T he block diagram is of a complete high efficiency resonant conversion quasi sine drive. C ombined voltage control and frequency control can be achieved with a conversion efficiency in the region of around 99%. T he 3 phase rectifiers, depicted as diodes in F igure 33, introduce diode drop losses of approximately 1.4 volts at the operating current of the drive. In percentage terms this represents a loss of around 0.3%. For a single phase drive, this is closer to 0.6%. These drive losses are comparable with PWM drive losses where the output stage is hard switching at about 4 to 8 kHz directly into the motor.

F igure 34 shows a graph of different power factors and crest control with a split function drive. R eferring to Figure 33 using a normal 3 phase supply (not shown) connected to 6 rectifiers and looking at the rectified waveform between C and D, there is a 120 degree window on each cycle for conduction as shown in F igure 34 as VjĀ¾. As the variable voltage drive output A to C (F igure 33) is set at a level that ensures correct motor torque, at a given motor speed, (in conjunction with the optimum setting of the variable frequency controller) it is usual for there to be continuous electrical connectivity possible to each of the 120 degrees for current conduction. By ensuring this is the case the current waveform is able to be itailored " to adopt the most suitable current at each instant during the cycle thereby optimising the utility power factor, crest factor and associated harmonics.

F igure 35 shows a block diagram of an active front end driver. This takes the place of the 6 diode rectifiers shown in F igure 33. T he block diagram in Figure 35 shows how three voltage control blocks are used so as to provide a versatile active front end power conversion system. In this example, a three phase AC to DC conversion is detailed so at least one of the three phases is always positive at any given time and likewise one of the three phases is always negative. During a full mains cycle there are periods where two of the three phases are positive and likewise there are times when two of the three phases are negative. T he topology in AC to DC mode, is a composite of synchronous rectification and boost voltage conversion. T he circuit in F igure 35 also ensures that the current drawn from the three phase connection L1 , L2 and L3 is power factor corrected, has a low crest factor and is supportive of the voltage waveform. In its DC to AC mode the circuit is also capable of full four quadrant operation. F igure 36 shows F igure 35 with an active front end. R eferring to F igure 36 it shows how a multi-function motor drive is configured. A DC connection point marked +ve and 0 between the active front end and the voltage control, allows a point of connection that provides a relatively stable and predictable voltage. T he active front end in F igure 36 boosts an incoming mains supply connected to the inputs of the active front end to this voltage level. The Voltage controller in F igure 36 can operate from zero volts to Vmax so as to isolate the motor from the voltage present at the DC link connection point. T he voltage controller in F igure 36 is adapted to reduce the voltage for normal motor operation. It will also operate with current flow in the opposite direction and under these conditions it can also boost the motor output voltage under braking to regenerate kinetic energy from the motor to electrical energy if required. T his is then available at the DC power input/output connection for storage or as power for other motors that may share this connection point

F igure 37 shows diagrammatically a range of power factor and crest control techniques using an active front end and a split function drive. Because there is a combination of synchronous rectification (active rectification) and step up conversion on each of the three phase inputs, it is possible to perform power factor correction over the full 360 degrees of the waveform. A conventional diode rectifier (not shown) and line reactor (not shown) each only has access to 240 degrees of the waveform at best. This is represented as the current draw window and allows the possibility of an idealised current waveform to be drawn during the whole of the voltage waveform. T he stabilised DC output voltage is just above the peak of the ripple of a theoretical voltage ripple waveform that could be achieved by using a conventional full wave rectification of the three phase input.

F igure 38 shows diagrammatically front end current paths under different modes. F igure 38 shows the way that the active front end, in conjunction with some energy storage capability and the motor drive, can perform several functions. S ome of the functions can occur at the same time. The size of the energy storage device (not shown) can be adjusted to suit the functions required. An indication of how energy is transferred to/from the unit, as shown in F igure 36, is detailed in F ig ure 38.

To avoid inrush current at the instant of connection or reconnection of a supply voltage to input 1 , input 2 or input 3, as shown in F igure 36, at an active front end of the circuit, it is necessary to incorporate some extra means to eliminate, or at least significantly reduce, the inrush current.

Aspects of the invention have been described by way of a number of exemplary embodiments, each exhibiting different advantageous features or benefits; and it is understood that features, components or circuits from two or more of the aforementioned embodiments may be combined together to overcome specific problems or to provide a bespoke solution to a particular problem.

It is appreciated that the torque ripple reduction device may be used with any reciprocating or rotating machine, including dynamos, generators as well as linear devices.




 
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