Field

The disclosed embodiments generally relate to transistor arrays or amplifiers and to methods of manufacture and control of transistor arrays or amplifiers. Certain disclosed embodiments relate to radio-frequency, microwave and millimetre-wave monolithic amplifiers.

Background

One of the design problems faced by engineers of amplifiers, in particular power amplifiers, is addressing heat generation and dissipation. In monolithic power amplifiers the amplifier must be designed to reach acceptable power levels while maintaining the circuit temperature below levels that lead to premature device failure due to thermal degradation. Thermal engineering is therefore a key part of amplifier design, including in radio-frequency, microwave and millimetre-wave monolithic power amplifiers.

A tool available for use in thermal engineering is a thermal model. If the model can accurately predict the thermal response of a circuit, including its transient thermal response, then an optimal design solution can be devised, balancing the goals of maximising performance while maintaining reliability.

In United States patent publication 2019/0028065 A1 it is proposed to sense operational temperatures of transistors. A source field plate or gate structure of a field- effect transistor serves as a thermally-sensitive structure in the transistor. A voltage sensing circuit may provide an output signal to a feedback circuit, for control of a power level of the transistor.

Reference to any prior art in the specification is not an acknowledgment or suggestion that this prior art forms part of the common general knowledge in any jurisdiction or that this prior art could reasonably be expected to be understood, regarded as relevant, and/or combined with other pieces of prior art by a skilled person in the art. Summary

Embodiments of a power amplifier or another circuit with transistors, in particular power transistors, are disclosed, which include structure for a thermal sensor. A metal structure is disposed proximate to heat generating transistors. The metal structure may be disposed between two transistors outside of the area occupied by the transistors. The metal structure may correspond to a gate of a field effect transistor or to a connector of a bipolar junction transistor. Operation of the power amplifier may be controlled based on a signal from the thermal sensor.

In some embodiments, a circuit includes at least one physical input for receiving one or more input signals, at least one physical output for outputting one or more output signals and circuitry operably connected to the at least one input and the at least one output. The circuitry includes a plurality of transistors for providing the output signal based on the input signal. The circuit also includes a metal structure outside of an area occupied by each of the plurality of transistors and in thermal contact with at least a first transistor and a second transistor of the plurality of transistors and electrical connections to the metal structure for providing a drive signal to the metal structure and for providing a sense signal from the metal structure responsive to the drive signal, wherein the sense signal is dependent on the temperature of the metal structure.

In some embodiments a circuit includes at least one physical input for receiving one or more input signals, at least one physical output for outputting one or more output signals and circuitry operably connected to the at least one input and the at least one output. The circuitry includes a plurality of transistors for providing the output signal based on the input signal, the plurality of transistors including a first transistor and a second transistor and a drain supply or a collector supply. The circuit also includes a metal structure in thermal contact with at least the first transistor and the second transistor and electrical connections to the metal structure for providing, from the drain supply or collector supply, a drive signal to the metal structure and for providing a sense signal from the metal structure responsive to the drive signal, wherein the sense signal is dependent on the temperature of the metal structure.

In some embodiments the second transistor is separated from the first transistor by a gap and the metal structure is located within the gap. The plurality of transistors may form a first array of a plurality of adjacent transistors including the first transistor and a second array of a plurality of adjacent transistors including the second transistor, wherein the gap is a gap between the first and second arrays of adjacent transistors. There may be no gap between transistors in at least one of the first array of adjacent transistors and the second array of adjacent transistors. Adjacent transistors within the first and/or second array of adjacent transistors may have a common physical component.

In some embodiments the first transistor is a field effect transistor, which has a common drain with an adjacent transistor in the first array of transistors. The second transistor may also be a field effect transistor, which has a common drain with an adjacent transistor in the second array of transistors.

In some embodiments the first transistor is a bipolar junction transistor, which has a common emitter or collector with an adjacent transistor in the first array of transistors. The second transistor may also be a bipolar junction transistor, which has a common emitter or collector with an adjacent transistor in the second array of transistors.

In some embodiments the first and second transistors are field effect transistors and the metal structure has substantially the same structure as a gate of the field effect transistors. In some embodiments the first and second transistors are bipolar junction transistors and the metal structure has substantially the same structure as a metal connector of the bipolar junction transistors. In other embodiments the arrays include different types of transistors.

In embodiments in which the second transistor is separated from the first transistor by a gap, the gap may be occupied by structure for a further transistor that is not an active transistor but if active would form a unitary array of active transistors with the first and second arrays. The metal structure located within the gap may be a part of the structure for the further transistor.

The circuit may be part of an amplifier, whereby the at least one physical input is for receiving an input signal for amplification, the at least one physical output is for outputting an amplified output signal, and the plurality of transistors are for providing the amplified output signal. The amplifier may be a power amplifier for radio frequency, microwave or millimetre-wave signals. The amplifier may be a monolithic power amplifier. The amplifier may be a pulsed amplifier.

Embodiments of a method of fabricating a monolithic integrated circuit include fabricating structure of an array of transistors in a monolithic integrated circuit, the structure of each transistor in the array including at least one metal component, fabricating a first set of connections for the structure, the first set of connections forming active transistors of the integrated circuit and fabricating a second set of connections for a sub-set of the structure including at least one said metal component, wherein the second set of connections is different to the first set of connections and provide structure for use by sensing circuitry to sense a temperature dependent variable of the at least one metal component, wherein the sub-set of the structure is not part of an active transistor of the integrated circuit.

In some embodiments the type of transistors in the array is a field effect transistor and the at least one metal component is a gate structure of the field effect transistor. In some embodiments the type of transistors in the array is a bipolar junction transistor and the at least one metal component is connector to a collector, emitter or base of the bipolar junction transistor. Either embodiment may have a combination of transistor types in the array.

In some embodiments the structure of the array of transistors forms an array in which adjacent active transistors share structural components.

In some embodiments the at least one metal component includes a metal component at a mid-point of the array of transistors.

Embodiments of a method of controlling operation of a plurality of power transistors in an integrated circuit include: operating the power transistors in a first configuration, during the operation, sensing a temperature related variable of a metal structure disposed between two of the power transistors and generating a signal based on the sensed temperature, receiving the signal at a controller for the integrated circuit; and based on the received signal modifying, by the controller, operation of the power transistors into a second configuration, different to the first configuration. Further embodiments will become apparent from the following description, given by way of example and with reference to the accompanying drawings.

Brief description of the drawings

Figures 1A and 1 B show a photograph and a diagrammatic representation respectively of an example power amplifier with structure for a thermal sensor.

Figure 2 shows a circuit diagram of a power amplifier including a thermal sensor, for example the power amplifier of Figures 1 A and 1 B.

Figure 3 shows an enlarged view of a portion of Figure 1 B.

Figure 4 shows an enlarged view of a portion of Figure 3.

Figures 5 and 6 show example sensing circuits, for use in controlling a power amplifier.

Figure 7 shows a portion of a power amplifier, for example the amplifier as depicted in Figure 1 B, with another embodiment of structure for a thermal sensor.

Figure 8 shows a flow chart of an example method of control of a power amplifier, based on a signal from a thermal sensor.

Like components appearing in different drawings in the accompanying figures are indicated by the same reference.

Detailed description of embodiments

Embodiments of the present disclosure generally relate to transistor arrays or signal amplifiers and more particularly to monolithic transistor arrays or power amplifiers for radio frequency, microwave and millimetre-wave signals. The following description focusses on embodiments in the form of a power amplifier. The power amplifier may be configured to operate in continuous wave operation or in pulsed wave operation, for example radar. Described embodiments of power amplifier include a transistor array including a thermal sensor. It will be appreciated that the thermal sensor may be applied to a transistor array that does not form part of an integrated amplifier. In some embodiments the thermal sensor includes a metal structure disposed proximate to heat generating transistors. The metal structure may be disposed between two transistors and/or may be located outside of the area occupied by the transistors. By separating the metal structure used for temperature sensing from the active transistors, the operating characteristics of the active transistors may remain unaffected or relatively unaffected by the inclusion of the thermal sensor.

For example, the transistors may be formed into two arrays, separated by a gap. The metal structure of the thermal sensor may be located within the gap. In some embodiments the metal structure has the same form as metal structure within the active transistors. Accordingly, a structure of the transistor arrays may be continued across the gap, with the connections differing between structure forming a transistor and structure associated with the thermal sensor. The arrays of transistors may have common structural components for example and depending on the type of transistor common sources, drains, emitters, collectors or bases.

Figure 1A shows a photograph of an example power amplifier 100 structured to include a thermal sensor. Figure 1 B shows a diagrammatic representation of the circuit layout of the power amplifier 100 visible in the photograph, with the reference numerals removed. Figure 2 shows a circuit diagram of the power amplifier 100, connected to example voltage/current sources/sinks.

The power amplifier 100 is a monolithic integrated circuit. The power amplifier may have application, for example, to 5G radio access networks, satellite communications and radar systems.

In the embodiment shown, the power amplifier 100 is a 10-watt, X-band high- power amplifier, in the form of a two-stage amplifier with a single 8 x 125 pm device for the first stage and four 8 x 125 pm devices for the second stage. The transistors have 0.15 pm gate length. It will be appreciated that the arrangements of thermal sensor and associated methods are applicable to other circuits, including amplifiers with less or more than two stages.

The power amplifier 100 includes an output transistor array 1. In the embodiment shown the output transistor array 1 is formed by field effect transistors (FETs). The FETs are gallium nitride (GaN) high electron mobility transistors (HEMTs). In the embodiment shown, the output transistor array 1 includes thirty-two FETs arranged as eight finger transistors. The FETs include a first bank 2 of four pairs of FETs, a second bank 3 of four pairs of FETs, a third bank 4 of four pairs of FETs and a fourth bank 5 of four pairs of FETs. The banks 2, 3, 4, 5 of FETs are each a linear array of FETs. The banks 2, 3, 4, 5 of FETs are aligned lengthwise and extend across a mid-portion of the amplifier substrate 6.

As previously mentioned, the example power amplifier 100 is a two-stage amplifier. A first stage transistor array 10 is also formed by FETs, which may have the same form as the FETs in the output transistor array 1. For example, the first stage transistor array 10 may also be GaN FIEMTs.

The power amplifier 100 also includes several pins. The output transistor array 1 is operably connected by conductor 7 to drain supply pins 7A and 7B. Second stage drain supply pins 7A, 7B provide the connections for a suitable source of drain current and power for the output transistor array 1 , including any associated circuitry. It will be appreciated that only a single pin is needed, but that two pins at different locations may provide increased usability. An input signal to be amplified by the power amplifier 100 is received at an input pin 8 and the output transistor array 1 is also operably connected to an output pin 9, which provides the connection to the load of the power amplifier 100. Second stage gate supply pin 11 provides power for the gates of the transistors in the output transistor array 1 . First stage gate supply pin 12 provides power for the gates of the transistors in the first stage transistor array 10. First stage drain supply pin 13 provides a connection for a suitable source of drain current and power for the first stage transistor array 10.

As described in further detail herein below, within the circuit layout of the power amplifier 100, between the bank 3 of FETs and the bank 4 of FETs, is a temperature sensor structure. In the embodiment shown, the temperature sensor is driven by a current provided sensor drive pins 14 and 15. The temperature sensor provides sense pins 16, 17 connected across the sensor so as to provide a voltage sense signal there between. Figure 3 shows an enlarged view of a portion of Figure 1 B and Figure 4 shows an enlarged view of a portion of Figure 3. The output transistor array 1 includes: a first transistor including a source S1 , a gate G1 and a drain D1 ; a second transistor including the drain D1 , a gate G2 and a source S2; a third transistor including the source S2, a gate G3 and a drain D2; a fourth transistor including the drain D2, a gate G4 and a source S3. The output transistor array 1 also includes: a fifth transistor including a source S4, a gate G5 and a drain D3, and a sixth transistor including the drain D3, a gate G6 and a source S5. The output transistor array 1 continues in the same pattern in both directions. As is apparent from Figures 1 A, 1 B and 2, the gates G1 to G6 (and the twenty-six other gates of the output transistor array) are driven by the first stage transistor array 10 and the drains D1 to D4 are connected to the drain supply, by one of the drain supply pins 7A and 7B.

A further gate structure GS is provided at a mid-point of the output transistor array 1 . Also provided at the mid-point of the output transistor array 1 is drain structure DS. Fabrication of the gate structure GS and drain structure DS during manufacture of the power amplifier 100 may proceed in the same way as the transistors in the output transistor array 1.

The drain structure DS has the same structure as each of the drains D1 to D4. Flowever, the drain structure DS is not connected to the drain supply; it is not connected to either of the drain supply pins 7A and 7B. The drain structure DS may instead be floating or connected to ground.

Similarly, the gate structure GS has the same structure as the pair of the gates G1 and G2 (which has the same structure as pairs G3-G4 and G5-G6). Flowever, the gate structure GS is not a gate of an active transistor in the amplifier. Unlike gates G1 to G4, the gate structure GS is not driven by the first stage transistor array 10. Instead, the gate structure GS is a temperature sensing component of a temperature sensor for the amplifier 100. The gate structure GS includes a first metal part GS1 and a second metal part GS2. Each of these have the same structure and configuration as the Gates G1 to G6. The first metal part GS1 and second metal part GS2 are both connected to conductor C1 . Conductor C1 may be of the same form as conductors C2, C3 provided to connect the gates G1 to G6 to the first stage transistor array 10, but unlike conductors C2 and C3 is not so connected. Conductor C2 and conductor C3 are connected by a low-resistance path P1 , thereby connecting the gates of the bank 3 of FETs and to the gates of the bank 4 of FETs. The low-resistance path P1 has the same or similar properties as the connections between the gates of other banks in the output transistor array 1. Similarly, the low-resistance path P2 connects the drains of the bank 3 of FETs and to the drains of the bank 4 of FETs, with the same or similar properties as the connections between other banks.

The first metal part GS1 is connected to connector C4, which in turn is connected by conductors, including respective resistors R1 , R2, to sensor drive pin 14 and sense pin 16. The second metal part GS2 is connected to connector C5, which in turn is connected by conductors, including respective resistors R3, R4, to sensor drive pin 15 and sense pin 17. Resistors R1 to R4 may be high value resistors to limit current flow.

Figure 5 shows the general configuration of a circuit for generating a signal indicative of a temperature of the power amplifier 100. It will be appreciated that implementations of the general circuit configuration may include additional passive and/or active components not shown in Figure 5. The circuit includes the gate structure GS, connected (via connectors C4, C5 and sensor drive pins 14, 15 which are not specifically shown or indicated in Figure 5) to a current source I. The current source I may be a source of alternating current or direct current. The current source I is configured to create a voltage drop across the gate structure GS and this voltage drop is detected by voltage sensor Vs. Voltage sensor Vs provides an output signal S related to the detected voltage drop.

The resistance of the gate structure GS is related to its temperature. In general the hotter the gate structure GS, the higher its resistance. Accordingly, if current source I is a source of constant current, then the voltage drop detected by the voltage sensor Vs will increase as the temperature of the gate structure GS increases. As the gate structure GS is in thermal contact with the output transistor array 1 , the detected voltage drop and hence the output signal S is an indicator of a temperature within the output transistor array 1. The relationship between actual temperature and the resistance or output signal S may be determined by modelling and/or experientially. Modelling may be based on power loss and may be based on a computation of heat conduction, for example a Green’s function, to accommodate for separation of the gate structure GS from the active transistors. An amplifier may be heated from an external source and the output signal or resistance at the required range of temperatures measured.

The temperature at the gate structure GS may not be the hottest parts of the amplifier 100. However, as the gate structure can be indicative of the temperature at the hottest parts of the amplifier, albeit with a time delay. The temperature drop and time delay may be accommodated for in the control strategy in the usual manner.

The output signal S is provided to a controller 50. The controller 50 receives the signal S and generates one or more control signals CS for one or more amplifier drivers 51. The control signals CS are related to the output signal S by one or more suitable transformation functions. The amplifier drivers 51 control one or more operational characteristics of the power amplifier 100, in particular one or more operational characteristics that affect the temperature of the power amplifier 100.

In some embodiments, the amplifier driver 51 controls the input signal to the power amplifier 100. With reference to the example power amplifier of Figures 1A, 1 B and Figure 2, the signal received at input pin 8 is controlled, by the amplifier driver 51 , based on the control signal CS. For example, the power of an RF signal at input pin 8 may be reduced if the indication of temperature of the amplifier, as detected by the gate structure GS and indicated by the signal S is beyond a threshold value. The reduction in power may be relative to a normal operation or target input signal power. Similarly, the power of an RF signal at input pin 8 may be increased if the signal S is below a threshold value (which may be the same or a different (lower) threshold value to the value that triggers power reduction). This may allow a maximum power output by the power amplifier.

In some embodiments, the amplifier driver 51 controls, based on the control signal CS, a gate bias of one or more transistors in the power amplifier 100. Referring again to the example of Figures 1 A, 1 B and Figure 2, the voltage supplied to first stage gate supply pin 12 by voltage source 18 may be controlled and varied based on the control signal CS. Alternatively or additionally, the voltage supplied to second stage gate supply pin 11 by voltage source 19 may be controlled and varied based on the control signal CS. In some embodiments, the amplifier driver 51 controls, based on the control signal CS, a drain supply of one or more transistors in the power amplifier 100. Referring again to the example of Figures 1A, 1 B and Figure 2, the voltage supplied to first stage drain supply pin 13 by voltage source 20 may be controlled and varied based on the control signal CS. Alternatively or additionally, the voltage supplied to second stage drain supply pin 7A by voltage source 21 may be controlled and varied based on the control signal CS.

In some embodiments the controller 50 and amplifier driver 51 each include a plurality of controllers, circuits or otherwise, which may be logically and/or geographically separate. In other embodiments the controller 50 and amplifier driver 51 may each be a single device, such as an integrated circuit and in some embodiments functions of the controller 50 and amplifier driver 51 may be combined into a single device.

In some embodiments the controller 50 and/or amplifier driver 51 is or includes a digital processor. Examples of suitable digital processors that are configurable to implement the control functions of the controller 50 and/or amplifier driver 51 include microprocessors, microcontrollers, programmable logic devices and application specific integrated circuits. The configuration includes either a memory in communication with the digital processor or a configuration of the logic devices within the digital processor. In some embodiments the controller is or includes analogue circuitry. The circuitry may include signal amplifiers, splitters or other components that implement the required transformation from the signal S to control signal CS.

It will be appreciated that the control of the input signal or voltage sources (or other operational variable of the amplifier that affects temperature) may be effected by various mechanisms. There may be a power supply circuit with an input to control the output of the power supply. There may be one or more variable components, for example variable resistors in a voltage divider. In the case of a pulsed power amplifier, there may be a duty cycle controller for the input signal, which is operable to increase or decrease the duty cycle. It will also be appreciated that there are other variables which may also influence the operation of the power amplifier, which place limits on or otherwise vary a control strategy for an operational variable that affects the temperature of the amplifier.

Figure 6 shows an alternative general configuration of a circuit for generating a signal indicative of a temperature of the power amplifier 100. The circuit of Figure 6 has like components to those of Figure 5, including the gate structure GS, a current source I, and a voltage sensor Vs for outputting a signal S. The signal S may be used for a control circuit, for example as described with reference to Figure 5. The circuit of Figure 6 requires only two pins and two conductors to the gate structure GS.

Figure 7 shows a part of the circuit layout corresponding to that of Figure 4, showing an example of a varied structure of an amplifier with a two wire implementation. The gate structure GS (see Figures 3 and 4) is connected via connector C6 to a first wire 70 for providing a drive signal, via resistor R5. In one embodiment the drive signal is provided by a pin of the amplifier. For example if the amplifier has a configuration similar to that shown in Figures 1A, 1 B, the drive signal may be provided at pin 14. In another embodiment the drive signal is provided by the drain supply, for example by a connection via resistor R5 to conductor 7. The drive signal may be provided by the collector supply in an implementation using bipolar junction transistors (BJTs).

The gate structure GS includes a connector C7, which connects the parts of the gate structure like conductor C1 of Figure 4. The gate structure is connected via connector C6 to ground, in this example a source of an adjacent transistor in the array.

The two wire implementation also includes a second wire 71 for providing a sense signal, via resistor R6, for sensing by the voltage sensor Vs. Resistors R5 and R6 may present a high impedance, to limit current flow. The resistance values selected may be higher in the embodiment in which the drive signal for the gate structure GS is provided by the drain supply.

In embodiments in which the power amplifier is a pulsed amplifier and the drive signal for the gate structure GS is provided by the drain supply, the voltage provided by the drain supply (e.g. at pin 7A or 7B) may be reduced during the off period. This reduction may result in a corresponding reduction in the current and power used by the thermal sensor, which in turn may reduce any additional heat in the circuit due to operation of the thermal sensor.

Figure 8 shows a flow diagram of an example method of controlling a power amplifier. The method may be implemented, for example, by the controller 50 of Figure 5. At step 80 an amplifier is caused to be driven in a first configuration. The first configuration may be set by the general requirements for the amplifier, for example based on a target operating condition. While the amplifier is operating in the first configuration, at step 81 a signal (e.g. the signal S as described herein with reference to Figures 5 and 6) based on measurement of the gate structure GS is detected. At step 82 a determination is made, based on the detected signal S, whether the detected signal S indicates temperature operation outside of or beyond one or more thresholds. If not, the amplifier continues with operations with no change based on temperature. If yes, then in response to the determination the method includes in step 83 causing the amplifier to operate in a modified configuration. As described herein, this may be effected by, for example, modifying an input signal, a gate bias and/or a drain supply. In other embodiments a modified configuration is an “off” configuration. For example, the amplifier may be switched off if the detected signal S indicates a temperature beyond a threshold indicating a maximum allowable operating temperature. The method then returns to step 81.

While the foregoing description has focussed on embodiments of circuits with a single thermal sensor, in other embodiments two or more thermal sensors are provided in a single circuit. Providing two or more thermal sensors that are spaced apart allows for more localised temperature sensing. For example distributing sensors within a circuit may assist to detect circuits that have been poorly adhered to a thermal heat sink, for example due to a void in the solder or epoxy that results in one or more hot spots on the surface. In two-stage amplifiers or amplifiers with more than two stages, one or more thermal sensors may be provided in each stage or in two or more of the stages.

The structures and techniques for temperature sensing may be applied to other monolithic signal amplifiers. For example, HEMT amplifiers with gallium arsenide (GaAs) or indium phosphide (InP) transistors may be used. The amplifiers may include various types of field-effect transistor, for example a junction-type FET, or an insulated gate type FET. The amplifiers may include bipolar junction transistors (BJTs).

In the case of BJTs, in some embodiments BJT structure is provided between two BJTs that are active parts of the amplifier. The BJT structure includes metal contacts for the base, emitter and collector. Any one or more of these in the inactive BJT structure may be connected to the drive line(s) and sense line(s) to provide structure for temperature based sensing and operation. Like with the banks of FET’s described herein the active BJTs may be in an array, with adjacent transistors in the array sharing structure, for example sharing emitters. The BJT structure used for temperature sensing may be a contiguous structure in a combined array BJT structures, in a similar way to the combined array of structures formed by the banks 2, 3, 4, 5 of FETs together with the gate structure GS and drain structure DS at the mid-point of the output transistor array 1 described herein.

In each case, a metal component within or proximate to output transistors of the amplifier is connected to one or more drive and sense lines, to enable temperature sensing. The metal component is part of a transistor of the same type as the output transistors, but is an additional fabricated transistor, not an active output transistor of the amplifier. The selected metal component may be a thin metal component, for example the thinnest metal component forming part of the transistor structure. It will be understood that the invention disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text or drawings. All of these different combinations constitute various alternative aspects of the invention.