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Title:
TRANSISTOR ARRAY SUBSTRATE, PRODUCTION METHOD FOR TRANSISTOR ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE, AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2021/095451
Kind Code:
A1
Abstract:
The present invention addresses the problem of disposing an optical element on the lower surface side of transistors without being influenced by heat treatment in a transistor forming process such that peeling, positional displacement, and the like do not easily occur. This transistor array substrate is provided with a first substrate (110) having transistors (113) disposed in an array, and a second substrate (120) having an optical element (122). The transistors are disposed on the front surface side of the first substrate, and the second substrate is bonded to a back surface of the first substrate by plasma joining processing.

Inventors:
AMARI KOICHI (JP)
NAGASAWA KOICHI (JP)
TSUNO HITOSHI (JP)
KAJIYA YOSHIHIKO (JP)
NAKANO SHINTARO (JP)
OKAZAKI TSUYOSHI (JP)
TORIYAMA AKIKO (JP)
YAGI YOSHITAKA (JP)
MAEDA KEIICHI (JP)
SAKAIRI TAKASHI (JP)
TANAKA TSUTOMU (JP)
Application Number:
PCT/JP2020/039295
Publication Date:
May 20, 2021
Filing Date:
October 19, 2020
Export Citation:
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Assignee:
SONY CORP (JP)
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
G02F1/1368; G02F1/1335
Domestic Patent References:
WO2019163486A12019-08-29
WO2017022450A12017-02-09
Foreign References:
JP2010039158A2010-02-18
US20140267756A12014-09-18
JP2012094720A2012-05-17
JP2000221541A2000-08-11
Attorney, Agent or Firm:
YAMAMOTO Takahisa et al. (JP)
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