Title:
TRANSISTOR, FORMING METHOD THEREOF, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/170144
Kind Code:
A1
Abstract:
A transistor, a transistor forming method thereof, and a semiconductor device. The transistor forming method comprises providing a substrate (100), the substrate (100) comprising a first region for forming a source region (101) and a second region for forming a drain region (102); forming a gate groove (103) in the substrate (100) to separate the first region and the second region, a part of the substrate (100) along the bottom of the gate groove (103) being used for constituting an embedded channel region (C) of the transistor; forming a gate dielectric layer (110) on the gate groove (103) of the substrate (100) to cover the embedded channel region (C) and to extend to cover a side of the first region and a side of the second region in the gate groove (103); and forming a gate conductive layer (120) on the gate dielectric layer (110) of the substrate (100) and in the gate groove (103).
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Inventors:
LI NING (CN)
Application Number:
PCT/CN2019/077501
Publication Date:
September 12, 2019
Filing Date:
March 08, 2019
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/78
Foreign References:
| CN108511518A | 2018-09-07 | |||
| KR20090039203A | 2009-04-22 | |||
| US20110018057A1 | 2011-01-27 | |||
| US20090176342A1 | 2009-07-09 | |||
| US20110169066A1 | 2011-07-14 | |||
| US20090321805A1 | 2009-12-31 |
Attorney, Agent or Firm:
SHANGHAI SAVVY INTELLECTUAL PROPERTY AGENCY (CN)
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