TRANSISTOR MANUFACTURING METHOD AND TRANSISTOR

WIPO Patent Application WO/2015/076334

A1

This transistor manufacturing method has the following steps: a step in which a fluorine-containing resin is used to form a first insulator layer (10) that covers a semiconductor layer (9) on a substrate (2) that also has a source electrode (6) and a drain electrode (7); a step in which a second insulator layer (11) is formed so as to cover the first insulator layer (10); a step in which a base film (12) is formed on at least part of the surface of the second insulator layer (11); and a step in which a metal that serves as an electroless catalyst is deposited onto the surface of the base film (12) and electroless plating is then used to form a gate electrode on the surface of the base film. The step in which the base film (12) is formed is performed by coating the surface of the second insulator layer (11) with a liquid (12S) that forms the base film (12), and the second insulator layer (11) exhibits higher affinity for said liquid (12S) than the first insulator layer (10) does.

JPH09181311	FIELD-EFFECT TRANSISTOR AND MANUFACTURE THEREOF
JP5721456	Semiconductor device
JP5880429	Manufacturing method of silicon carbide semiconductor device

KOIZUMI SHOHEI (JP)
SUGIZAKI TAKASHI (JP)
KAWAKAMI YUSUKE (JP)

PCT/JP2014/080769

May 28, 2015

November 20, 2014

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NIKON CORP (JP)

H01L21/336; C23C18/31; C23C18/32; C23C28/00; H01L21/28; H01L21/288; H01L21/3205; H01L21/768; H01L29/41; H01L29/786; H01L51/05

JP2005150640A	2005-06-09
JP2007036247A	2007-02-08
JPH04119331A	1992-04-20

SHIGA Masatake et al. (JP)
Masatake Shiga (JP)

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