Title:
TRANSISTOR
Document Type and Number:
WIPO Patent Application WO/2018/138764
Kind Code:
A1
Abstract:
This transistor (100) is provided with: a metal layer (2) disposed on a rear surface portion of a dielectric substrate (1); a gate electrode (3) disposed on a surface portion of the dielectric substrate (1), and having a gate bus bar (31) and a plurality of gate fingers (321-3210) electrically connected to each other by the gate bus bar (31); and a source electrode (5) which is disposed on the surface portion of the dielectric substrate (1) and electrically connected to the metal layer (2) by vias (11a, 11b) that pass through the dielectric substrate (1), wherein a portion of the gate bus bar (31) is configured from an air bridge wire, and a portion of the source electrode (5) is disposed between said air bridge wire and the dielectric substrate (1).
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Inventors:
KAMIOKA JUN (JP)
YAMANAKA KOJI (JP)
HANGAI MASATAKE (JP)
YAMANAKA KOJI (JP)
HANGAI MASATAKE (JP)
Application Number:
PCT/JP2017/002280
Publication Date:
August 02, 2018
Filing Date:
January 24, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H01L21/338; H01L29/812
Foreign References:
| JPH0750422A | 1995-02-21 | |||
| JP2013183061A | 2013-09-12 | |||
| JP2007081124A | 2007-03-29 | |||
| JPH098064A | 1997-01-10 |
Attorney, Agent or Firm:
TAZAWA, Hideaki et al. (JP)
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