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Title:
TRANSMISSION DEVICE, RECEPTION DEVICE, TRANSMISSION/RECEPTION SYSTEM, AND IMAGE DISPLAY SYSTEM
Document Type and Number:
WIPO Patent Application WO/2015/050136
Kind Code:
A1
Abstract:
In serial data transmitted from a transmission device (10) to a reception device (20), transitions from a first level to a second level occur each unit period. Image data consists of first-type data in which there are two or more transitions from the second level to the first level in each unit period. Control data consists of second-type data in which there is one transition from the second level to the first level in each unit period and the number of bits at the second level in each unit period corresponds to a control signal.

Inventors:
MATSUDA HIROMICHI (JP)
UCHIDA TAKATOSHI (JP)
SUZUKI TAKAYUKI (JP)
Application Number:
PCT/JP2014/076161
Publication Date:
April 09, 2015
Filing Date:
September 30, 2014
Export Citation:
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Assignee:
THINE ELECTRONICS INC (JP)
International Classes:
H04L25/40; H04L29/06
Domestic Patent References:
WO2005101773A12005-10-27
WO2002065690A12002-08-22
Foreign References:
JPH0822364A1996-01-23
Other References:
JEONG-HO KANG ET AL.: "A Clock-embedded Voltage Differential Signaling (CVDS) for the Chip-On-Glass Application of TFT-LCD", SID 10 DIGEST, 2010, pages 66 - 69
DONG HOON BAEK ET AL.: "Late-NewsPaper: The Enhanced Reduced Voltage Differential Signaling (eRVDS) Interface With Clock Embedded Scheme for Chip-On-Glass TFT-LCD Applications", SID 10 DIGEST, 2010, pages 70 - 73
Attorney, Agent or Firm:
HASEGAWA Yoshiki et al. (JP)
Yoshiki Hasegawa (JP)
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