Title:
TRENCH GATE DEPLETION-TYPE VDMOS DEVICE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2020/078315
Kind Code:
A1
Abstract:
Disclosed are a trench gate depletion-type VDMOS device and a manufacturing method therefor. The device comprises: a drain region (209); a trench gate comprising a gate insulating layer (204) located on an inner surface of a trench, and a gate electrode (201) filled in the trench and surrounded by the gate insulating layer; a channel region (206) located around the gate insulating layer (204); well regions (202) located on two sides of the trench gate; source regions (203) located in the well regions (202); drift regions (205) located between the well regions (202) and the drain region (209); a second conductive-type doped region (208) located between the channel region (206) and the drain region (209); and first conductive-type doped regions (207) located on two sides of the second conductive-type doped region (208) and located between the drift regions (205) and the drain region (209).
Inventors:
GU YAN (CN)
CHENG SHIKANG (CN)
ZHANG SEN (CN)
CHENG SHIKANG (CN)
ZHANG SEN (CN)
Application Number:
PCT/CN2019/111016
Publication Date:
April 23, 2020
Filing Date:
October 14, 2019
Export Citation:
Assignee:
CSMC TECHNOLOGIES FAB2 CO LTD (CN)
International Classes:
H01L29/66; H01L29/78
Foreign References:
| CN203521427U | 2014-04-02 | |||
| CN203521427U | 2014-04-02 | |||
| CN105448733A | 2016-03-30 | |||
| US20180040698A1 | 2018-02-08 | |||
| US6194741B1 | 2001-02-27 | |||
| US20150221765A1 | 2015-08-06 |
Other References:
See also references of EP 3869566A4
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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