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Title:
A TWO-WIRE TRAILING EDGE CONTROL DIMMER ARRANGEMENT AND A METHOD FOR CONTROL DIMMING THEREOF
Document Type and Number:
WIPO Patent Application WO/2015/081367
Kind Code:
A1
Abstract:
A method for controlling dimming of a two-wire trailing edge dimmer arrangement to minimise the effects of ripple injection or superimposing of supply authority ripple control signals upon AC voltage mains supply received by the two-wire trailing edge dimmer arrangement when controlling luminosity to a load under the control. The method includes the step of generating a stable timing reference signal to control an OFF period for a load control arrangement, said load control arrangement adapted to turn off electrical power to a load under control of a two-wire trailing edge dimmer arrangement at a trailing edge of an AC mains supply input wave whereby initialisation and/or timing at which said stable timing reference signal is generatable is variable by a switch detection level of a comparator monitoring amplitude of a scaled, low pass filtered, replica of an active terminal and a load terminal voltages of said two-wire trailing edge dimmer arrangement.

Inventors:
TRACY PHILIP (AU)
Application Number:
PCT/AU2014/001052
Publication Date:
June 11, 2015
Filing Date:
November 19, 2014
Export Citation:
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Assignee:
HENDON SEMICONDUCTORS PTY LTD (AU)
International Classes:
H05B39/04; G05F1/00; H05B41/36
Foreign References:
EP2542034A12013-01-02
US7339331B22008-03-04
Attorney, Agent or Firm:
COLLISON & CO (Adelaide, South Australia 5001, AU)
Download PDF:
Claims:
CLAIMS

1. A method for controlling dimming of a two-wire trailing edge dimmer

arrangement to minimise the effects of ripple injection or superimposing of supply authority ripple control signals upon AC voltage mains supply received by the two- wire trailing edge dimmer arrangement when controlling luminosity to a load under the control of the two-wire trailing edge dimmer arrangement, said method including at least a step of: generating a stable timing reference signal to control an OFF period for a load control arrangement, said load control arrangement adapted to turn off electrical power to a load under control of a two-wire trailing edge dimmer arrangement at a trailing edge of an AC mains supply input wave; whereby initialisation and/or timing at which said stable timing reference signal is generatable is variable by a switch detection level of a comparator monitoring amplitude of a scaled, low pass filtered, replica of an active terminal and a load terminal voltages of said two-wire trailing edge dimmer arrangement.

2. The method of claim 1 wherein the switch detection level of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the load terminal voltages of said two-wire trailing edge dimmer arrangement includes at a resistive attenuator in an input signal path to the comparator.

3. The method of claim 2 wherein the resistive attenuator attenuation is switchable by a micro-controller port line or electronic switch.

4. The method of claim 1 wherein the switch detection level of the comparator monitoring amplitude of the scaled, low-pass filtered, replica of the active terminal and the load terminal voltages of the two-wire trailing edge dimmer arrangement includes a switchable input DC voltage reference amplitude to the comparator.

5. The method of claim 4 wherein the switchable input DC voltage reference ampiitude to the comparator includes switched attenuation through a switchable reference voltage path to the comparator.

6. The method of claim 5 wherein the switchable input DC voltage reference amplitude to the comparator is switchable by applying switched voltage reference sources.

7. The method of claim 6 wherei the switched voltage reference sources are provided by a microcontroller.

8. The method of claim 2 or 3 wherein the resistive attenuator in the input signal path to the comparator is connected to a positive input terminal of the comparator.

9. The method of claim 5, 6 or 7 wherein the switchable reference voltage path to the comparator is connected to a negative input of the comparator.

10. The method of claim 9 wherein the switchable reference voltage input to the comparator is between 1.8 V to 5.0 V when the switch detection level of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the load terminal voltages detects the two-wire trailing edge dimmer arrangement at the dimmest.

11. The method of claim 9 wherein the switchable reference voltage input to the comparator is between 0.8 V to 1 ,7V when the switch detection level of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the load terminal voltages detects the two-wire trailing edge dimmer arrangement at the brightest.

12. The method of claim 10 wherein the switchable reference voltage input to the comparator is 2.4 V when the switch detection level of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the load terminal voltages detects the two-wire trailing edge dimmer arrangement at the dimmest.

13. The method of claim 11 wherein the switchable reference voltage input to the comparator is 1 ,2V when the switch detection ievel of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the ioad terminal voltages detects the two-wire trailing edge dimmer arrangement at the brightest.

14. The method of claim 1 wherein the load control arrangement for turning off electrical power to the load includes a control switch with back-to-back Field Effect Transistors.

15. The method of claim 14 wherein the Field Effect Transistors are N-Channel enhancement mode MQSFETs with source terminais connected together, with gates connected together and the drain terminals of each back-to-back Fieid Effect Transistor corrected to a corresponding active terminal or ioad terminal.

16. The method of claim 15 wherein each Field Effect Transistor has an intrinsic body diode so as to allow conduction of current through the two-wire trailing edge dimmer arrangement in one direction.

17. A two-wire trailing edge dimmer arrangement including controlled dimming according to anyone of the methods defined in claims 1 to 16.

Description:
A TWO-WIRE TRAILING EDGE CONTROL DIMMER ARRANGEMENT AND A METHOD FOR CONTROL DIMMING THEREOF

TECHNOLOGICAL FIELD

[001] This invention relates to a two-wire trailing edge dimmer arrangement and more particularly to a method of controlling the operation and dimming of such two- wire trailing edge dimmers so as to moderate, eliminate and/or substantially ameliorate the effects of ripple injection and/or superimposi g of supply authority ripple control signals upon the AC voltage mains supply which the dimmer

manipulates to control the luminosity to a corresponding light.

BACKGROUND ART DISCUSSION

[002] Phase-cut dimmers operate by switching AC mains supply to the lamp or light ioad for only a chosen time portion of each AC mains supply half cycle. For the most part the objective is to maintain that timing as accurately and as stable as possible. Conventionally, the time period for which AC mains supply is applied to the load is determined by an analogue or digital timer, controlling the load switching device, that must be started and stopped at exact times during each AC mains supply half cycle.

[003] Two-wire trailing edge dimmers also referred to as reverse phase control dimmers remove power from the end or trailing edge of each AC mains supply cycle. These two terminal dimmers have replaced the conventional single pole light switches and for the most part are wired in series with the load and the time at which the timer is started and stopped, once again for the most part is derived by

processing the voltage that appears across the active and load dimmer voltage terminals.

[004] in one simple form, the instant at which the dimmer terminal voltage falls to zero volts is used as the reference instant that stops and starts the timer wherein power is removed from the load. [005] Nonetheless the addition of AC voltages to the AC mains supply frequencies, that allow supply authorities to remotely switch equipment, can cause variations in the instant at which the dimmer's terminal voltage will cross any particular voltage !eve!, including zero volts. Consequently that in turn causes variations in the time that the dimmer applies the mains AC supply to the lamp or light load and results in modulation of the power delivered to the lamp or light and hence causes flickering and/or changes in lamp brightness.

[006] This ripple injection and/or superimposing of additional AC voltages to the AC mains supply are problematic to the effective dimming capabilities of the dimmer if it is going to appropriately be able to control th luminosity of the light or lamp over the dimming range without undesirable light intensit flickering. Therefore there is the requirement to reduce the modulating effects of those supply authority controi signals referred to generally as "ripple control" signals, on the dimmer's control of the luminosity of the light to the relevant load.

[007] As the added or injected AC ripple frequencies are at frequencies higher than those of the AC mains supply frequency, dimmers may introduce low-pass filtering of the dimmer's voltage into the controi circuitry in order to remove this unwanted injected ripple frequency interference.

[008] The prior art is full of patents that describe and claim for complex filtering means to regenerate a stable signal equivalent in time to the instant at which the AC mains supply frequency component of the terminal voltage, in the absence of any injected ripple frequency, would cross zero voltage.

[009] Nonetheless the problem with low-pass filtering is that it inherently introduces a time delay and may result in that the timing signal that is produced will only be available after the dimmer terminal voltage has actually crossed zero volts and therefore too late for use in trailing edge dimmers that require the timer provided by the generated reference signal to be initialised or made available slightly before the dimmer terminal voltage crosses zero volts. [0 0] While it wou!d be expected that additional timing means may be utilised to generate a further timing delay so that stable information derived from one AC mains supply half cycle could be used to start the dimmer's timing reference signal to control the OFF period to a load for a subsequent half cycle, such a solution is not part of the answer to the relevant problem in this invention wherein the object will be to generate a stable timing reference signal to control the OFF period for a load control switch responsible for turning off the electrical power to the load at an end or trailing edge of the AC mai s supply whereby the timing of being able to generate this stable timing reference signal will be immediate without the use or requirement of additional timers.

[011] Further objects and advantages of the invention will become apparent from a complete reading of the specification.

SUMMARY OF THE INVENTION

[012] in one form of the invention there is provided a method for controlling dimming of a two-wire trailing edge dimmer arrangement to minimise the effects of ripple injection or superimposing of supply authority ripple control signals upon AC voltage mains supply received by the two-wire trailing edge dimmer arrangement when controlling luminosity to a load under the control of the two-wire trailing edge dimmer arrangement, said method including at least a step of:

[013] generating a stable timing reference signal to control an OFF period for a load control arrangement, said load control arrangement adapted to turn off electrical power to a load under control of a two-wire trailing edge dimmer arrangement at a trailing edge of an AC mains supply input wave;

[014] whereby initialisation and/or timing at which said stable timing reference signal is generatable is variable by a switch detection level of a comparator monitoring amplitude of a scaled, low pass filtered, replica of an active terminal and a load terminal voltages of said two-wire trailing edge dimmer arrangement. [0 5] in preference in one embodiment of the invention the switch detection level of the comparator monitoring amplitude of the scaled, low pass filtered, replica of the active terminal and the load terminal voltages of said two-wire trailing edge dimmer arrangement includes at least one resistive attenuator in an input signal path to the comparator.

[016] In preference the resistive attenuator attenuation is switchabie by a microcontroller port line or other electronic switch.

[017] in an alternative embodiment of the invention in preference the switch detection level of the comparator monitoring amplitude of the scaled, low-pass filtered, replica of the active terminal and the load terminal voltages of the two-wire trailing edge dimmer arrangement includes a switchabie input DC voitage reference amplitude to the comparator.

[018] in preference the switchabie input DC voltage reference amplitude to the comparator is by switched attenuation in a reference voltage path into the

comparator.

[019] In an alternative embodiment of the invention the switchabie input DC voltage reference amplitude to the comparator is switchabie by applying switched voltage reference sources.

[020] in preference the switched voltage reference sources are controlled, applied and/or made available by a microcontroller.

[021] Advantageously this invention provides for a method that is able to utilise the basic circuit structure of a conventional low-pass filtering of the dimmer terminal voltage but instead of generating a timing signal based on the crossing of some single voitage reference level by the filtered voitage, the timing signal is based upon the crossing of two or more reference voltage levels which for the most part offer essentially simultaneous adjustment of the dimmer's phase control timer. [022] Advantageously the ability to adapt to the changing requirements of the timing signai as the dtmmer's brightness is varied provides adequate reduction in the effects of interfering ripple tones without the use of having to introduce the complications associated with additional timers and/or complex filtering means to regenerate a stable equivalent in time to the instant at which the AC mains supply frequency component of the terminal voltage, in the absence of the ripple tones, would cross zero voltage as is the case currently in the prior art.

[023] This unique invention relies on the introduction of the capability to dynamically change the detection voltage level utilised in order to provide a timing system with the benefits of retaining simplicity while allowing the dimmer's control to cope with a wide variation in dimmer terminal voltages and wave forms that become increasingly important for the control of non-linear lighting loads suc as LED and compact fluorescent lamps.

[024] In preference the load control arrangement for turning off electrical power to the load includes a control switch with back-to-back Field Effect Transistors.

[025] In preference the back-to-back Field Effect Transistors are N-Channel enhancement mode MOSFETs with source terminals connected together with gates connected together and the drain terminals acting as two power terminals.

[026] In preference each Field Effect Transistor has an intrinsic body diode so as to allow conduction of current through the dimmer in one direction.

[027] in preference the active terminal and load terminal voltages are each bridge rectified by a corresponding diode.

[028] in preference the resistive attenuator in the input signai path to the comparator is connected to a positive input terminal of the comparator and the switchable reference voltage is connected to a negative input of the comparator.

[029] in preference the switchable reference voltage input to the comparator is between 1.8 V to 5.0 V when detection has the dimmer at or towards the dimmest. [030] in preference the reference voltage input to the comparator is between 0.8 V to 1.7V when detection has the dimmer at or towards the brightest.

[031] in preference the reference voltage input to the comparator is about 2.4V when detection has the dimmer at or towards the dimmest.

[032] in preference the reference voltage input to the comparator is about 1.2V when detection has the dimmer at or towards the brightest.

[033] in order now to describe the invention in greater detail, preferred embodiments and a more detailed discussion of the problem which this invention addresses, will be described with the assistance of the accompanying illustrations and associated text.

BRIEF DESCRIPTION OF THE ILLUSTRATIONS

[034] Figure 1 illustrates an electrical circuit and part block diagram of two-wire trailing edge dimmer in a preferred embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

[035] Figure 1 illustrates the use of a typical low-pass filter and detector

arrangement used in conventional two-wire trailing edge dimmer circuitry but importantly further including the ability whereby the initialisation and/or the timing of the stable timing reference signal is generated by switching detection level of the comparator monitoring the amplitude of the scaled, low-pass filtered, replica of the active terminal and load terminal voltages of the dimmer whereby, as will be discussed in greater detail, this ability to generate the timing and/or initialisation of the stable timing reference signal through the variable switching detection level can be achieved independently within the circuitry by including at least one resistive attenuator in the input signal path to the comparator or having swttchable DC voltage reference amplitudes inputted to the comparator. [036] in Figure 1 the electrical circuit and part block diagram of a microcontroller is shown generally as (10) and includes the dimmer terminals ACTIVE (12) and LOAD (14).

[037] The dimmer terminal voltage is effectively bridged by rectified diodes (16) and (18) and the parasitic diodes (20), (22) are contained in the Field Effect Transistors (FETs) (24), (26) that comprise the load current switch. As illustrated FETs (24) and (26) are arranged back to back and operate in the N-Channel enhancement mode having source terminals connected together with the gates also connected and the drain terminals acting as two power terminals.

[038] The FETs (24) and (26) as referred to above, each has corresponding intrinsic body diodes (20) and (22) that aiiow conductio of current in one direction and as configured the back to back arrangement of the FETs allows current flow to be controlled in either direction.

[039] After rectification resistors (28), (30) provide attenuation and for practical purposes low-pass filtered by capacitor (32) in conjunction with resistor (30).

[040] in this invention the conventional dimmer circuit just described is modified by the further inclusion of the variable attenuator consisting of resistors (36) and (34) as well as switch (38) so as to avoid the situation in a conventional dimmer where in practice the large range of voltage appearing across the dimmers terminal as the "closed" time is varied, to vary the lamp's brightness, means that the voltage of the comparator input may either remain always greater than the reference voltage or always smaller than it.

[041] In these cases no reference signal will be produced by the comparator. Even if the amplitudes fall within the detection range of the comparator in the conventional dimmer, using a single reference level, the rate of change of the low-pass filtered voltage can become very slow. This causes the comparator's threshold to be crossed slowly and that will appear as time variations in the timing reference signal that is required to be very stable. [042] Advantageously through the use of the variable attenuator consisting of resistors (34) and (36) and switch (38) or aiternatively by switching different reference voltages to the comparator the shortcomings associated with the conventional dimmers when faced by the modulating effects of those suppl authority control signals can be substantially avoided.

[043] The variable attenuator consisting of resistors (34) and (36) and switch SI is preferred as the comparator can use a very stable band-gap reference, at

approximately 1.1V to 1 .2V, and can be contained in a microcontroller that also preferabiy can include the switch (38) that is capable of operating on a supply voltage of 3,3V or less to minimise power consumption.

[044] As illustrated when the resistive attenuator is in the input signal path (40) connected to the positive (42) input of the comparator (44) and the switchable different reference voltages (46) is connected to the negative input (48) of the comparator (44).

[045] The timing reference pulse (50) which wilf start the timer of Gate ON period is input into microcontroller (52) which provides the switch control signal (54) in this instance which is inputted into a signal amplifier (56) with a voitage range of 3.3V to 10 V onto power FETs (24) and (26).

[046] The broken lines (57) represents that all those components contained therein in some preferred embodiments could all be included on the same microcontroller.