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Title:
TYPE-2 COMPENSATION WITH REDUCED QUIESCENT CURRENT
Document Type and Number:
WIPO Patent Application WO/2023/034191
Kind Code:
A1
Abstract:
A compensation circuit includes a tail current source (118), an error amplifier (102); a compensation resistor (114), and a voltage-to-current converter circuit (106). The tail current source (118) is configured to generate a tail current. The error amplifier (102) is coupled to the tail current source (118) and biased by the tail current. The compensation resistor (114) is coupled to the error amplifier (102). The voltage-to-current converter circuit (106) is coupled to the error amplifier (102). The compensation resistor (114) is configured to vary in resistance responsive to a change in the tail current, or the voltage-to-current converter circuit (106) is configured to vary in transconductance responsive to the change in the tail current.

Inventors:
SHARMA ANMOL (US)
Application Number:
PCT/US2022/041837
Publication Date:
March 09, 2023
Filing Date:
August 29, 2022
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
TEXAS INSTRUMENTS INC (US)
International Classes:
H03F1/12; H02M3/04; H02M3/145; H03F1/34
Foreign References:
US20080218145A12008-09-11
US20090206815A12009-08-20
US20110156688A12011-06-30
US20150155783A12015-06-04
CN111490679A2020-08-04
Attorney, Agent or Firm:
DAVIS, Valerie et al. (US)
Download PDF:
Claims:
CLAIMS

What is claimed is:

1. A compensation circuit, comprising: a tail current source; an error amplifier coupled to the tail current source, and including an input and an output; a variable compensation resistor coupled to the tail current source and the output of the error amplifier; a voltage-to-current converter circuit including: an input coupled to the output of the error amplifier; and an output coupled to the input of the error amplifier.

2. The compensation circuit of claim 1, wherein: the tail current source is configured to generate a tail current; and the variable compensation resistor is configured to increase in resistance responsive to a decrease in the tail current, and decrease in resistance responsive to an increase in the tail current.

3. The compensation circuit of claim 2, wherein the tail current source is configured to: increase the tail current responsive to an increase in current output of the voltage-to-current converter circuit; and decrease the tail current responsive to a decrease in current output of the voltage-to-current converter circuit.

4. The compensation circuit of claim 2, wherein unity gain bandwidth of the error amplifier is independent of the tail current.

5. The compensation circuit of claim 1, wherein the variable compensation resistor includes: a first transistor including: a drain coupled to the output of the error amplifier; a gate coupled to the tail current source; and a source; and a second transistor including: a drain coupled to the source of the first transistor; a gate coupled to the tail current source; and a source coupled to ground.

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6. A compensation circuit, comprising: a tail current source; an error amplifier coupled to the tail current source, and including an input and an output; a voltage-to-current converter circuit including: a first input coupled to the output of the error amplifier; a second input coupled to the tail current source; and an output coupled to the input of the error amplifier.

7. The compensation circuit of claim 6, wherein: the tail current source is configured to generate a tail current; and the voltage-to-current converter circuit is configured to increase in transconductance responsive to a decrease in the tail current, and decrease in transconductance responsive to an increase in the tail current.

8. The compensation circuit of claim 7, wherein the tail current source is configured to: increase the tail current responsive to an increase in current output of the voltage-to-current converter circuit; and decrease the tail current responsive to a decrease in current output of the voltage-to-current converter circuit.

9. The compensation circuit of claim 7, wherein: the voltage-to-current converter circuit includes a variable resistor coupled to the output of the voltage-to-current converter circuit; and the variable resistor is configured to increase in resistance responsive to a decrease in the tail current, and decrease in resistance responsive to an increase in the tail current.

10. The compensation circuit of claim 9, further comprising: an amplifier including: a first input coupled to the output of the voltage-to-current converter circuit; a second input; and an output; and a fixed resistor coupled to the output of the amplifier and the second input of the amplifier.

11. The compensation circuit of claim 10, wherein the transconductance is the resistance of the variable resistor divided by a resistance of the fixed resistor.

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12. A compensation circuit, comprising: a tail current source configured to generate a tail current; an error amplifier coupled to the tail current source and biased by the tail current; a compensation resistor coupled to the error amplifier; and a voltage-to-current converter circuit coupled to the error amplifier; wherein: the compensation resistor is configured to vary in resistance responsive to a change in the tail current; or the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.

13. The compensation circuit of claim 12, wherein the tail current source is configured to: increase the tail current responsive to an increase in current output of the voltage-to-current converter circuit; and decrease the tail current responsive to a decrease in current output of the voltage-to-current converter circuit.

14. The compensation circuit of claim 12, wherein the compensation resistor is configured to increase in resistance responsive to a decrease in the tail current, and increase in resistance responsive to a decrease in the tail current.

15. The compensation circuit of claim 12, wherein the voltage-to-current converter circuit is configured to increase in transconductance responsive to a decrease in the tail current, and decrease in transconductance responsive to an increase in the tail current.

16. A switch-mode power supply, comprising: an output terminal; a voltage divider coupled to the output terminal; a tail current source configured to generate a tail current; an error amplifier coupled to the voltage divider and the tail current source; a compensation network coupled to the error amplifier; and a voltage-to-current converter circuit coupled to the error amplifier and the output terminal; wherein: the compensation network is configured to vary in resistance responsive to a change in the tail current; or

10 the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.

17. The switch-mode power supply of claim 16, wherein: the compensation network includes compensation resistor coupled to a compensation capacitor; and the compensation resistor is configured to increase in resistance responsive to a decrease in the tail current, and increase in resistance responsive to a decrease in the tail current.

18. The switch-mode power supply of claim 17, wherein the compensation resistor includes: a first transistor including: a drain coupled to an output of the error amplifier; a gate coupled to the tail current source; and a source; and a second transistor including: a drain coupled to the source of the first transistor; a gate coupled to the tail current source; and a source coupled to ground.

19. The switch-mode power supply of claim 16, wherein the voltage-to-current converter circuit is configured to increase in transconductance responsive to a decrease in the tail current, and decrease in transconductance responsive to an increase in the tail current.

20. The switch-mode power supply of claim 16, wherein: the voltage-to-current converter circuit includes a variable resistor coupled to an output of the voltage-to-current converter circuit; and the variable resistor is configured to increase in resistance responsive to a decrease in the tail current, and decrease in resistance responsive to an increase in the tail current.

11

Description:
TYPE-2 COMPENSATION WITH REDUCED QUIESCENT CURRENT

BACKGROUND

[0001] A switch-mode power supply is an electronic circuit that converts an input direct current (DC) supply voltage into one or more DC output voltages that are higher or lower in magnitude than the input DC supply voltage. A switch-mode power supply that generates an output voltage lower titan the input voltage is termed a buck or step-down converter. A switch-mode power supply that generates an output voltage higher than the input voltage is termed a boost or step-up converter. The stabi lity of the switch-mode power supply may be compromised by gain and phaseshift introduced in the control loop of the power supply. Compensation may be applied in a switchmode power supply to counteract the gain and phase shift.

SUMMARY

[0002] Type-2 compensations circuits that allow for reduced quiescent current while maintaining unity gain bandwidth are described herein. In one example, a compensation circuit includes a tail current source, an error amplifier, a variable compensation resistor, and a voltage-to-current converter circuit. The error amplifier is coupled to the tail current source, and includes an input and an output. The variable compensation resistor is coupled to the tail current source and the output of the error amplifier. The voltage-to-current converter circuit includes an input coupled to the output of the error amplifier, and an output coupled to the input of the error amplifier.

[0003] In another example, a compensation circuit includes a tail current source, an error amplifier, and voltage-to-current converter. The error amplifier is coupled to the tail current source, and includes an input and an output. The voltage-to-current converter circuit includes a first input coupled to the output of the error amplifier, a second input coupled to the tail current source, and an output coupled to the input of the error amplifier.

[0004] In a further example, a compensation circuit includes a tail current source, an error amplifier; a compensation resistor, and a voltage-to-current converter circuit. The tail current source is configured to generate a tail current. The error amplifier is coupled to the tail current source and biased by the tail current. The compensation resistor is coupled to the error amplifier. The voltage- to-current converter circuit is coupled to the error amplifier. The compensation resistor is configured to vary in resistance responsive to a change in the tail current, or the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.

[0005] In a yet further example, a switch-mode power supply includes an output terminal, a voltage divider, a tail current source, an error amplifier, a compensation network, and voltage-to- current converter circuit. The voltage divider is coupled to the output terminal. The tail current source is configured to generate a tail current. The error amplifier is coupled to the voltage divider and the tail current source. The compensation network is coupled to the error amplifier. The voltage- to-current converter circuit is coupled to the error amplifier and the output terminal. The compensation network is configured to vary in resistance responsive to a change in the tail current, or the voltage-to-current converter circuit is configured to vary in transconductance responsive to the change in the tail current.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006] FIG. 1 is a block diagram for an example circuit that includes type-2 compensation with reduced quiescent current as described herein.

[0007] FIG. 2 is a schematic diagram for an example compensation resistor suitable for use in the circuit of FIG. 1.

[0008] FIG. 3 is a graph of step response of an error amplifier with high quiescent current.

[0009] FIG. 4 is a graph of step response of an error amplifier with low quiescent current and compensation adaptation.

[0010] FIG. 5 is a block diagram for an example circuit that includes type-2 compensation with reduced quiescent current and compensation adaptation by varying transconductance.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0011] Compensation circuits are employed to stabilize the control loop in switch-mode power supply circuits and other feedback loop-controlled circuits. The type (e.g., type-1, type-2, or type- 3) of compensation circuit employed is selected based on various parameters (e.g., output filter component type and size, switching frequency, bandwidth, etc.) of the circuit being controlled. Type-2 compensation is widely used in DC-DC switch mode power supply circuits and other circuits. For example, type-2 compensation may be used in applications where the frequency of the zero caused by the circuit output capacitor and its equivalent series resistance is smaller than the closed loop bandwidth of the control loop.

[0012] The control loop used in a switch-mode power supply includes an error amplifier that generates an error signal representative of the difference in power supply output voltage and a reference voltage. The error amplifier is a key contributor to the quiescent current consumption of the circuit. For example, while some switch-mode power supply circuits implement a low-power mode (such as clock skipping) for use in light load situations, the error amplifier remains active in the low-power mode, which limits quiescent current reduction. Various techniques for reducing quiescent current (e.g., reducing error amplifier tail current) based on load or dynamic bias are not applicable to circuits using type-2 compensation because changing tail current also changes the unity gain bandwidth of the circuit, which changes system dynamics and stability.

[0013] The type-2 compensation circuits described herein reduce the quiescent current of the error amplifier without changing the dynamic characteristics of the circuit. The compensation circuits cause unity gain bandwidth independent of tail current, which allows the tail current to be reduced in light load situations to reduce circuit quiescent current consumption.

[0014] FIG. 1 is a block diagram for an example circuit 100 that includes type-2 compensation with reduced quiescent current as described herein. The circuit 100 may be included in a switchmode power supply (e.g., a buck converter, a boost converter, etc.). The circuit 100 includes an error amplifier 102, a compensation network 104, a voltage-to-current converter circuit 106, an output terminal 108, an output capacitor 110, and a voltage divider 112. The output terminal 108 is coupled to the output capacitor 110 and the output of the voltage-to-current converter circuit 106. Current flows from the voltage-to-current converter circuit 106 to charge the output capacitor 110 and power circuitry external to the circuit 100. The voltage divider 112 is coupled to the output terminal 108 voltage (Vout). The voltage divider 112 divides Vout and provides the divided Vout to the error amplifier 102. A first input of the error amplifier 102 is coupled to the voltage divider 112, and a second input of the voltage divider 112 is coupled to a voltage reference. The error amplifier 102 compares the divided Vout received from the voltage divider 112 to a reference voltage received from the voltage reference to generate an error signal that is representative of the difference between the reference voltage and the divided output voltage. A third input of the error amplifier 102 is coupled to a tail current source 118 that generates a tail current for biasing the error amplifier 102. The output of the error amplifier 102 is coupled to the compensation network 104. The compensation network 104 includes a compensation resistor 114 and a compensation capacitor 116. The compensation resistor 114 is coupled to the compensation capacitor 116. The resistance (Rc) of the compensation resistor 114 is variable, rather than fixed. [0015] The output of the error amplifier 102 is coupled to an input of the voltage-to-current converter circuit 106. The voltage-to-current converter circuit 106 generates an output current based on the error signal received from the error amplifier 102. The voltage-to-current converter circuit 106 may include various components to perform the voltage to current conversion. For example, the voltage-to-current converter circuit 106 may include an inductor, drive transistors coupled to the inductor, and a pulse generation circuit (e.g., a pulse width modulator) coupled to the drive transistors. The pulse generation circuit may generate pulses to activate the drive transistors based on the error signal generated by the error amplifier 102.

[0016] Unity gain bandwidth of the circuit 100 may be expressed as: where: gm is the transconductance of the error amplifier 102; gm2 is the transconductance of the voltage-to-current converter circuit 106;

Rc is the resistance of the compensation resistor 114;

Vref is the reference voltage provided to the error amplifier 102; and

Cout is the capacitance of the compensation capacitor 116.

[0017] In the circuit 100, the tail current source 118 varies the current ITAIL provided to the error amplifier 102 based on the current flowing from the output of the voltage-to-current converter circuit 106 to the output terminal 108. In equation (1), to maintain unity gain bandwidth of the circuit 100 with varying ITAIL(and varying transconductance of the error amplifier 102), the circuit 100 changes the resistance (Rc) of the compensation resistor 114 or changes the transconductance (gm2) of the voltage-to-current converter circuit 106. For example, as ITAIL decreases (and the transconductance of the error amplifier 102 decreases responsive to ITAIL), the resistance of the compensation resistor 114 or the transconductance of the voltage-to-current converter circuit 106 increases to maintain the unity gain bandwidth of the circuit 100.

[0018] FIG. 2 is a schematic diagram for an example compensation resistor 114 (a variable compensation resistor) suitable for use in maintaining unity gain bandwidth in the circuit 100. The compensation resistor 114 includes multiple transistors connected source to drain. In FIG. 2, the compensation resistor 114 is shown to include four transistors 208, 210, 212, and 214. Other implementations of the compensation resistor 114 may include a different number of transistors, or any other implementation of a resistor where resistor value (Rc) increases with decreasing current (IT AIL). The drain of the transistor 208 is coupled to the output of the error amplifier 102. The source of the transistor 208 is coupled to the drain of the transistor 210. The source of the transistor 210 is coupled to the drain of the transistor 212. The source of the transistor 212 is coupled to the drain of the transistor 214. The gates of the transistor 208, the transistor 210, the transistor 212, and the transistor 214 are coupled to the current source 206 that provides a bias current 207 corresponding to IT AIL.

[0019] The compensation resistor 114 is biased in the triode region while the circuit 100 is operating with a high output current. As current flow from the current source 206 is reduced to reduce quiescent current consumption, the bias voltage provided to the transistors 208-214 is reduced, and the resistance of the compensation resistor 114 increases. Thus, the compensation resistor 114 may be a variable resistor, the resistance of which increases as ITAIL decreases. Some implementations of the compensation resistor 114 may include circuitry different from that of FIG. 2 to vary compensation resistance based on quiescent current of the error amplifier 102.

[0020] FIG. 3 is a graph of step response of the error amplifier 102 with high quiescent current. The illustrated response is indicative of desired unity gain band width of the circuit 100. The feedback signal 302 applied at the first input of the error amplifier 102 is illustrated as a step voltage falling below a 1-volt reference voltage. The error signal 304 is generated by the error amplifier 102 with compensation adaptation, and the error signal 306 is generated by an error amplifier without compensation adaptation. FIG. 3 shows that with high quiescent current, the bandwidth of the circuit 100 is about the same as the bandwidth of a circuit that includes type-2 compensation and no compensation adaptation.

[0021] FIG. 4 is a graph of step response of an error amplifier 102 with low quiescent current (e.g., 1/10 the quiescent current as provided in FIG. 3). The error signal 402 shows response of an error amplifier with low quiescent current and no compensation adaptation for reduced quiescent current. The error signal 404 shows response of the error amplifier 102 with low quiescent current and compensation adaptation by increasing the resistance of the compensation resistor 114 based on the tail current provided to the error amplifier 102. The error signal 404 closely resembles the error signal 306 shown in FIG. 3, indicating that the bandwidth of the circuit 100 with low quiescent current is similar to the bandwidth of the circuit 100 with high quiescent current. FIG. 4 shows that without compensation adaptation the bandwidth of the error amplifier is reduced with low quiescent current (because response is slow and sluggish which is indicative of low bandwidth), while bandwidth of the error amplifier 102 is maintained when using the compensation adaptation described herein.

[0022] FIG. 5 is a block diagram for an example circuit 500 that includes type-2 compensation with reduced quiescent current and compensation adaptation by varying transconductance. The circuit 500 includes the error amplifier 102, the compensation network 104, the voltage-to-current converter circuit 106, a variable resistor 502, an amplifier 504, a resistor 506, a transistor 508, and a current mirror circuit 510. The resistor 506 is a fixed resistor (a fixed value of resistance). The output of the voltage-to-current converter circuit 106 is coupled to the variable resistor 502 and to a first input of the amplifier 504. A second input of the amplifier 504 is coupled to the resistor 506 and a source of the transistor 508. The output of the amplifier 504 is coupled to the gate of the transistor 508. The drain of the transistor 508 is coupled to the current mirror circuit 510. The current mirror circuit 510 generates a current I_gm2 corresponding to the current flowing through the transistor 508. In a switching regulator, a current comparator (not shown) may compare I_gm2 to current flowing in an inductor (not shown) to control switching in the regulator.

[0023] In the circuit 500, the transconductance (gm2) is represented as:

_ Rv gm2 = — R where:

Rv is the resistance of the variable resistor 502; and

R is the resistance of the resistor 506.

[0024] In the circuit 500, the resistance (Rv) of the variable resistor 502 increases as the quiescent current of the error amplifier 102 decreases (as IT AIL decreases). Increasing Rv increases the voltage (VI) at the input of the amplifier 504, increases I_gm2, and increases the transconductance gm2 as per equation (2). Thus, the transconductance gm2 increases as the quiescent current decreases, and unity gain bandwidth is maintained with change in quiescent current per equation (1). The variable resistor 502 may be implemented similar to the compensation resistor 114 as shown in FIG. 2.

[0025] Other implementations of the circuit 500 may include different circuitry to vary the transconductance gm2 based on the quiescent current of the error amplifier 102.

[0026] In this description, the term “couple” may cover connections, communications or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is directly coupled to device B; or (b) in a second example, device A is indirectly coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B, so device B is controlled by device A via the control signal generated by device A.

[0027] Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.