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Title:
ULTRA LOW PHASE NOISE FREQUENCY SYNTHESIZER
Document Type and Number:
WIPO Patent Application WO/2016/203460
Kind Code:
A3
Abstract:
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Inventors:
JOSEFSBERG YEKUTIEL (IL)
LAVIAN TAL I (US)
Application Number:
PCT/IB2016/054790
Publication Date:
June 29, 2017
Filing Date:
August 09, 2016
Export Citation:
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Assignee:
JOSEFSBERG YEKUTIEL (IL)
LAVIAN TAL I (US)
International Classes:
H03L7/185; H03L7/085; H03L7/113; H03L7/20
Domestic Patent References:
WO2003026133A12003-03-27
Foreign References:
US6122326A2000-09-19
US7102446B12006-09-05
US6657464B12003-12-02
Other References:
JAVIER GISMERO ET AL: "9 GHz phase locked oscillator using a sampling phase detector. Application to VSAT local oscillators (18-27GHz)", EUROPEAN MICROWAVE CONFERENCE, 1993. 23RD, IEEE, PISCATAWAY, NJ, USA, 1 October 1993 (1993-10-01), pages 784 - 786, XP031065304
TENG K H ET AL: "Microwave phase-locked loop circuit development and efficiency improvement", HIGH FREQUENCY POSTGRADUATE STUDENT COLLOQUIUM, 2003 8 - 9 SEPT. 2003, PISCATAWAY, NJ, USA,IEEE, 8 September 2003 (2003-09-08), pages 128 - 131, XP010665557, ISBN: 978-0-7803-8123-0, DOI: 10.1109/HFPSC.2003.1242323
RAMADANE ALI LIMAN ET AL: "Noise in sampling phase detectors for RF PLL", MICROWAVE CONFERENCE, 2009. EUMC 2009. EUROPEAN, IEEE, PISCATAWAY, NJ, USA, 29 September 2009 (2009-09-29), pages 480 - 483, XP031669975, ISBN: 978-1-4244-4748-0
ATESOGLU A ET AL: "Low-power fully integrated 10-gb/s sonet/sdh transceiver in 0.13-/spl mu/ cmos", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 38, no. 10, 1 October 2003 (2003-10-01), pages 1595 - 1601, XP011101722, ISSN: 0018-9200, DOI: 10.1109/JSSC.2003.817586
Attorney, Agent or Firm:
SCHALDENBRAND, Michael A. et al. (US)
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