VARIABLE-LENGTH BIT DATA PROCESSING CIRCUIT AND METHOD
Document Type and Number:
WIPO Patent Application WO/1996/010788
A variable-length bit data processing circuit includes first, second and third one-word registers (12, 20, 22). Data from a memory is loaded to the first register (12), and variable-length bit data is taken out from the third register (22). The second and theird registers (20, 22) are coupled with a barrel shifter (16), which shifts two-words of data in accordance with barrel shift quantity data based on the number of effective bits and remaining bits obtained from a subtracter (30).
April 11, 1996
September 27, 1995
G06F12/04; G06F5/01; H03M7/40; H03M7/42; H04N1/41; H04N7/26; (IPC1-7): G06F12/04