Title:
VOLTAGE CORRECTION COMPUTATIONS FOR MEMORY DECISION FEEDBACK EQUALIZERS
Document Type and Number:
WIPO Patent Application WO/2019/139647
Kind Code:
A1
Abstract:
A device (10) includes a first terminal configured to receive a reference voltage, a second terminal configured to receive a weighted tap value (86), a local generator circuit (504, 506, 508, 510) configured to create a group (476, 478, 480, 482) of unsigned voltage correction values based on the reference voltage and the weighted tap value (86), and a sign configuring circuit (511) configured to receive the group (476, 478, 480, 482) of unsigned voltage correction values from the local generator circuit (504, 506, 508, 510) and assign a polarity to each respective unsigned voltage correction value of the group (476, 478, 480, 482) of unsigned voltage correction values, creating correction signals from the group (476, 478, 480, 482) of unsigned voltage correction values. The device (10) also includes an output configured to transmit the correction signals to a first input of a processing circuit, wherein the processing circuit is configured to use the correction signals to offset inter-symbol interference from a data stream on a distorted bit based at least on a control signal.
Inventors:
WU JUN (CN)
PAN DONG (US)
PAN DONG (US)
Application Number:
PCT/US2018/050744
Publication Date:
July 18, 2019
Filing Date:
September 12, 2018
Export Citation:
Assignee:
MICRON TECHNOLOGY INC (US)
International Classes:
G11C7/10
Foreign References:
| US8126045B2 | 2012-02-28 | |||
| US9484967B1 | 2016-11-01 | |||
| US20090187807A1 | 2009-07-23 | |||
| US9722820B1 | 2017-08-01 |
Other References:
CHEN ZHANG, AN AREA EFFICIENT 4GB/S 3-TAP DECISION FEEDBACK EQUALIZER WITH CURRENT-INTEGRATING SUMMER, May 2016 (2016-05-01), Boston, Massachusetts, XP55623757, Retrieved from the Internet
Attorney, Agent or Firm:
MANWARE, Robert A. et al. (US)
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