WAFER PLACEMENT TABLE

WIPO Patent Application WO/2024/004039

A1

This wafer placement table 10 comprises an upper base material 20, a lower base material 30, through-holes 36, screw holes 24, and screw members 50. The upper base material 20 comprises a ceramic base material 21 that has an electrode 22 embedded therein, and has a wafer placement surface 21a on the upper surface of the ceramic base material 21. The lower base material 30 comprises refrigerant flow path grooves 34 that are disposed at the surface opposite the wafer placement surface 21a of the upper base material 20, and that constitute side walls and the bottom of refrigerant flow paths 32. The through-holes 36 pass through the lower base material 30 in the vertical direction so as to intersect the refrigerant flow paths 32. The screw holes 24 are provided at positions facing the through-holes 36 in the lower surface of the upper base material 20. The screw members 50 are inserted from the lower surface of the lower base material 30 into the through-holes 36 and are screwed into the screw holes 24. The refrigerant is configured so as not to leak out from the through-holes 36 onto the lower surface of the lower base material 30.

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KUNO TATSUYA (JP)
ISHIKAWA MASAKI (JP)
INOUE SEIYA (JP)

PCT/JP2022/025789

January 04, 2024

June 28, 2022

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NGK INSULATORS LTD (JP)

H01L21/683

WO2018038044A1

2018-03-01

JPH02135141U	1990-11-09
JP2014053481A	2014-03-20
JP2006344955A	2006-12-21
JP2017538278A	2017-12-21
JP2002246160A	2002-08-30
JP2019041024A	2019-03-14

ITEC INTERNATIONAL PATENT FIRM (JP)

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