Title:
WASHLESS FLUX, AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE
Document Type and Number:
WIPO Patent Application WO/2016/111142
Kind Code:
A1
Abstract:
The invention of the present application provides a washless flux comprising (A) a solvent having such a property that the temperature at which the mass thereof is reduced to 50% of the original value is 160 to 210ºC as measured by a thermogravimetric analysis and (B) a di- or tri-carboxylic acid having such a property that the temperature at which the mass thereof is reduced to 50% of the original value is 190 to 320°C as measured by a thermogravimetric analysis, wherein the component (B) is contained in an amount of 0.3 to 3.0 parts by mass relative to 100 parts by mass of the washless flux. The washless flux can be used in a semiconductor packaging process comprising: applying the washless flux between a solder bump, which is formed on a semiconductor chip, and a wiring line, which is formed on a substrate and is coated with a solder, at room temperature; soldering the solder bump with the wiring line; cooling the soldered product to 100 to 120°C; filling an underfill material between the semiconductor chip and the substrate while keeping at the same temperature; and curing the underfill material.
Inventors:
NISHISAKO YUKI (JP)
SHIRAI YUKIO (JP)
SUZUKI OSAMU (JP)
SHIRAI YUKIO (JP)
SUZUKI OSAMU (JP)
Application Number:
PCT/JP2015/085518
Publication Date:
July 14, 2016
Filing Date:
December 18, 2015
Export Citation:
Assignee:
NAMICS CORP (JP)
International Classes:
B23K35/363; B23K1/00; B23K31/02; H01L21/60; H05K3/28; H05K3/34; B23K101/40
Foreign References:
| JP2004025305A | 2004-01-29 | |||
| JP2013091093A | 2013-05-16 |
Attorney, Agent or Firm:
WATARAI YUSUKE (JP)
Yuusuke Watarai (JP)
Yuusuke Watarai (JP)
Download PDF: