A QUADRATURE MODULATION SYSTEM

TECHNICAL FIELD

[01] Aspects of the disclosure include processing of an input signal over a wireless communication channel to receiving and signal processing equipment using digital modulation techniques. In particular, aspects of the invention relate to wireless audio equipment (e.g., wireless microphones).

BACKGROUND

[02] A wireless microphone (which may be referred as a radio microphone) is typically a microphone without a physical cable connecting the wireless microphone directly to associated sound recording or amplifying equipment. There are numerous standards spanning different transmission spectra and transmission technologies used to support a wireless microphone's connection to associated receiving equipment. For example, the connection may utilize ultra-high frequencies (UHF) or very high frequency (VHF) frequencies with an analog modulation technique such as frequency modulation (FM) or amplitude modulation (AM). Some low cost wireless models may use infrared light typically requiring a direct line of sight between the wireless microphone and the receiving apparatus, while costlier radio frequency models may use radio frequency signal that does not require a direct line of sight. Some models operate on a single fixed frequency, but the more advanced models often operate on a user selectable frequency to avoid interference allow the use of several wireless microphones at the same time.

[03] Wireless microphones are often advantageous by providing greater freedom of movement for the artist or speaker, avoidance of cabling problems common with wired microphones, and reduction of cable "trip hazards" in the performance space. However, wireless microphones may have deficiencies resulting from limited range, excessive range causing interference to/from other radio equipment, and limited operating time. Operating time is limited relative to battery life and is typically shorter than a normal condenser microphone due to greater drain on batteries from transmitting circuitry from circuitry providing extra features. [04] Wireless microphone technology is currently moving from analog approaches such a FM to digital approaches. However, digital approaches often involve complex modulation (i.e., simultaneous amplitude and phase modulation of the transmitted carrier waveform). Such complex modulation often complicates the modulator as compared to analog approaches. For example, traditional FM systems are often highly optimized in terms of battery life (i.e., power consumption) and monetary cost.

SUMMARY

[05] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. However, this summary is not intended to identify key features or essential features of the disclosure.

[06] A communications system incorporates a quadrature modulator system to reduce power consumption with respect to traditional approaches and may support any two- dimensional digital technique. The quadrature modulator system comprises different subsystems, including a digital-analog transformation circuit, a baseband filter, and a quadrature modulator. The digital-analog transformation circuit converts discrete time samples to a continuous time signal, and further includes an oversampling noise- shaping modulator such as a sigma-delta modulator. The baseband filter then removes out-of-band energy including sampling images and quantization noise. Embodiments may support different types of wireless audio equipment including wireless microphones and audio body packs.

[07] With another aspect of the disclosure, an oversampling noise-shaping modulator converts a digital in-phase (I) signal and a digital quadrature (Q) signal to a quantized I signal and the digital Q signal to a quantized Q signal, respectively, where the quantized signals are quantized with a desired number of quantized bits per sample. A digital- analog converter (DAC) then converts the quantize signals into corresponding analog signals that are further filtered to reduce noise signal components. A quadrature modulator then transforms the filtered signals and a local oscillator signal to a transmitted output signal, which may be transmitted to a wireless receiver. [08] With another aspect of the disclosure, some of the circuit components may comprise discrete devices that result in a reduction of power consumption for the quadrature modulator system.

[09] With another aspect of the disclosure, some or all of the circuit components may be incorporated into a same electronic device. For example, an in-phase/quadrature-phase (I/Q) converter and oversampling noise-shaping modulator may be implemented within one field-programmable gate array.

BRIEF DESCRIPTION OF THE DRAWINGS

[10] A more complete understanding of the exemplary embodiments the present invention and the advantages thereof may be acquired by referring to the following description in consideration of the accompanying drawings, in which like reference numbers indicate like features and wherein:

[11] Figure 1 shows a communications system with wireless microphones in accordance with aspects of the disclosure.

[12] Figure 2 shows a quadrature modulator system in accordance with aspects of the disclosure.

[13] Figure 3 shows a block diagram of a sigma-delta modulator used as an oversampling noise-shaping modulator in accordance with aspects of the disclosure.

[14] Figure 4 shows a block diagram of a sigma-delta modulator used as an oversampling noise-shaping modulator in accordance with aspects of the disclosure,

[15] Figure 5 shows a block diagram for a low resolution digital-to-analog converter (DAC) in accordance with aspects of the disclosure.

[16] Figure 6 shows a low pass second order spectral density of a sigma-delta DAC in accordance with aspects of the disclosure.

[17] Figure 7 shows a zoomed version of the spectral density shown in Figure 6 in accordance with aspects of the disclosure. [18] Figure 8 shows a block diagram of a discrete quadrature modulator in accordance with aspects of the disclosure.

[19] Figure 9 shows an apparatus that processes an input signal and transmits the processed signal over a wireless channel to wireless receiving and signal processing equipment in accordance with aspects of the disclosure.

DETAILED DESCRIPTION

[20] In the following description of the various exemplary embodiments, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration various embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural and functional modifications may be made without departing from the scope of the present invention.

[21] Figure 1 shows a communications system with wireless microphones 101 and 102 communicating with wireless receiving and signal processing equipment 103 over wireless channels 153 and 154, respectively, in accordance with aspects of the disclosure. With some embodiments, more than one wireless microphone (e.g., with forty or more wireless microphones for some musical theater productions) may be used to support different members (corresponding to input signals 151 and 152) of a performance group. In such cases, wireless equipment 103 may be housed in a half-rack configuration, so that two can be mounted together in a rack system. While Figure 1 shows only one communications channel between each wireless microphone 101, 102 and wireless receiving and signal processing equipment 103, some embodiments may also support diversity receivers which receive multiple channels of transmission from each microphone to provide additional robustness.

[22] Embodiments may support wireless audio equipment that attaches to a user (e.g., a body pack) and that processes an input signal obtained from a separate microphone.

[23] A spectrally efficient complex modulation may be used when spectral efficiency (bps/Hz) is an important consideration due to operation in the UHF band (often referred as TV whitespace) where limited bandwidth exists. Because complex modulation refers to simultaneous amplitude and phase modulation of a transmitted carrier signal over communications channels 153 and 154, complex modulation typically complicates the modulator as compared to analog modulation, e.g., frequency modulation. Traditional FM systems are often highly optimized in terms of battery life (i.e., power consumption) and monetary cost which has set a certain expectation in the industry. As will be further discussed, some embodiments address cost considerations (e.g., power, monetary, and size) for the support of digital carrier modulation.

[24] Wireless microphone 101 includes digital I/Q converter 104, oversampling noise- shaping modulator 105a, low resolution digital-analog converter (DAC) 105b, filter 106, and analog quadrature modulator 107. While oversampling noise-shaping modulator 105a and DAC 105b are shown as two elements in Figure 1, oversampling noise-shaping modulator 105a may share some commonality with DAC 105b and may be partially implemented in a single electronic device, e.g., digital signal processor (DSP), microprocessor, application specific integrated circuit (ASIC), or field- programmable gate array (FPGA).

[25] Digital I/Q converter 104 converts input signal 151 (corresponding to an analog waveform) into a digitally modulated waveform that includes an in-phase (I) signal component and a quadrature-phase (Q) signal component (which has a 90 degree phase displacement with respect to the I signal component) in order to provide a two dimensional representation of the digitally modulated waveform.

[26] The digitally modulated waveform is then processed by quadrature modulation system 108, which includes oversampling noise-shaping modulator 105a, low resolution digital-analog converter (DAC) 105b, filter 106, and analog quadrature modulator 107. With some embodiments, quadrature modulation system 108 optimizes power consumption as will be further discussed. Quadrature modulation system 108 processes the digitally modulated waveform (comprising the I and Q signal components) and forms an analog modulated carrier, which may be represented as: s(t) = R _Q (e ^JW ' x (I(t) +jQ(t))) (EQ. 1)

[27] Wireless receiving and signal processing equipment 103 processes signals received over channels 153 and 154 and forms processed signal 155 that may be recorded on a recording medium or may be played through an acoustic system (e.g., a speaker system).

[28] Figure 2 shows a quadrature modulator system 200 in accordance with aspects of the disclosure. Quadrature modulator system 200 is a collection of subsystems to create an optimized quadrature modulator, where important metrics are power cost, monetary cost, and size cost when compared to traditional systems. With some embodiments, some of the components may be implemented in electronic device 201, e.g., field programmable gate array (FPGA) or application specific integrated circuits (ASIC).

[29] With traditional systems, an external high speed current-steering digital-to-analog converter integrated circuit is often used. However, with some embodiments, quadrature modulator system 200 uses sigma-delta modulator 203 and low resolution DAC 204 for the I component and sigma-delta modulator 206 and low resolution DAC 207 for the Q component. As will be further discussed, sigma-delta modulators 203 and 206 and low resolution DACs 204 and 207 may be implemented within the same field- programmable logic array (FPGA) or application specific integrated circuits (ASIC) that is often used to implement discrete time processing of an input signal in wireless audio equipment.

[30] Sigma-delta modulator 203 supports sigma-delta (ΣΔ) (sometimes referred as delta- sigma (ΔΣ)) modulation for encoding high resolution signals into lower resolution signals by using pulse-density modulation.

[31] Using sigma-delta modulation, quadrature modulation system 200 typically has less power consumption and lower cost compared to traditional digital-analog converters. For example, as compared to a traditional system using a high speed current steering DAC integrated circuit, quadrature modulation system 200 consumes approximately 70% less power, costs approximately 50% less, and has a size cost that is approximately 30% less. Additionally, some or all of quadrature modulation system 200 may be included into existing digital logic (e.g., ASIC or FPGA) that already exists in the wireless system 101, further reducing their cost and power.

[32] In addition to the replacement of external DACs that are often used in traditional systems, quadrature modulation system 200 also reduces digital routing (corresponding to reducing I/O requirements) with the incorporation of the DACs into the same electronic chip as preceding digital processing.

[33] Embodiments may incorporate different on-off chip combinations. For example, all functionalities of quadrature modulation system 200 may be on one chip (electronic device). Alternatively, some embodiments may incorporate only the digital I/Q generator, oversampling noise-shaping modulator, and digital-analog converter on one chip. With other embodiments, the digital I/Q generator, oversampling noise-shaping modulator, digital-analog converter, and analog quadrature modulator may be on one chip while the baseband filters may be external to the chip. With other embodiments, the digital I/Q generator, oversampling noise-shaping modulator, and digital-analog converter may be on one chip while the baseband filters and the analog quadrature modulator are located on a second chip.

[34] Quadrature modulation system 200, whose sampling is driven by clock 208, includes three circuit components (subsystems), including digital-analog transformation circuit 213, baseband filter 209, and analog quadrature modulator 212. Digital-analog transformation circuit 213, which converts discrete time samples to a continuous time signal, further includes oversampling noise-shaping modulator (e.g., sigma-delta modulator) 203 and DAC 204. Baseband (BB) filter 209 then removes out-of-band energy including sampling images, quantization noise, and so forth. With some embodiments, filter 209 comprises an active filter. The filter order, filter shape, and filter cutoff frequency is typically dependent on the specifics of the sigma-delta modulator. For example, a specific sigma-delta modulator may be modeled and a spectral density plot may be created. From the spectral density plot, a magnitude frequency response may be specified such that the out-of-band noise level is reduced to a desired level. From this magnitude frequency response, a filter with an appropriate order, shape (e.g., Butterworth, Chebyshev, etc.), and cutoff frequency may be selected. While circuit components 202-204 and 209 are associated with I signal processing, similar circuit components 205-207 and 210 are associated with Q signal processing.

[35] Analog quadrature modulator 212 then multiplies the generated, analog forms of in- phase (I) and quadrature-phase (Q) waveforms with an analog complex sinusoid of the desired carrier frequency based on RF oscillator 211 in accordance with EQ. 1. [36] Quadrature modulation system 200 enables a carrier to be modulated in both amplitude and phase (or equivalently in-phase and quadrature-phase) simultaneously to support any two-dimensional modulation digital scheme to be realized, including digital quadrature amplitude modulation (QAM), phase shift keying (PSK), orthogonal frequency division multiplexing (OFDM), and continuous phase modulation (CPM). Quadrature modulation system 200 may be incorporated in different wired and wireless communication systems, including wireless microphone systems.

[37] Digital up converters (DUCs) 202 and 205 add additional samples to digital I and Q signals 251 and 252, respectively. For example, each sample may be repeated so that the sample rate is increased

[38] With oversampling noise-shaping modulator 203, resolution in time is traded for resolution in amplitude (i.e., quantization level) by oversampling the input signal. With some embodiments, oversampling noise-shaping modulator 203 may comprise a sigma-delta modulator (which may also be referred as a delta-sigma modulator).

[39] Baseband filters 209 and 210 provide filtering of analog I and Q signals, respectively, to reject sampling images and out-of-band quantization noise. Baseband filters 209 and 210 may assume an active filter configuration in order to create low bandwidth filters where inductor sizes become prohibitively large.

[40] Discrete implementation of analog quadrature modulator 212 helps to minimize power consumption. This allows optimization of each element of the analog quadrature modulator 212. The main elements include balanced mixers 801 and 802, phase splitter 803, and analog summer 804 as shown in Figure 8. Analog quadrature modulator 212 forms RF output signal 257 (corresponding to transmitted signals that are carried over communications channels 153 and 154 as shown in Figure 1).

[41] With some embodiments, some of the subsystems may be interconnected using differential signals over connections 253-256, in which transmitted output signals comprise corresponding non-inverted and inverted signals to reduce signal contamination. [42] Figure 3 shows block diagram of a sigma-delta modulator 301 (corresponding to sigma- delta modulator 203 as shown in Figure 2) used as a oversampling noise-shaping modulator in accordance with aspects of the disclosure. As previously discussed, sigma- delta modulator 301 may be located in the same electronic circuit (e.g., FPGA 201) as preceding processing logic (e.g., digital I/Q converter 104). In addition, some or all of low resolution DAC 306 may be incorporated in the same electronic device.

[43] H(z), which is the transfer function of modulator filter 303, and the number of quantizer bits associated with quantizer 304, are the primary tunable parameters of sigma-delta modulator 301.

[44] The transfer function H(z) of modulator filter 303 may be determined from the noise transfer function (NTF) and the signal transfer function (STF) by:

NTF = Y(z)/N(z) = 1/(1 +H(z)) (EQ. 2)

STF = Y(z)/X(z) = H(z)/(1+H(z)) (EQ. 3)

[45] For example, a second order filter transfer function H(z) when NTF = (1-z ¹ ) ² = 1 - 2z ^_1 + z ^"2 by:

H(z) = (1-NTF)/NTF = (2z ^_1 - z ^"2 ) / (1 - 2z ^_1 + z ^"2 ) (EQ. 4)

The above NTF results in a 2 ^nd order H(z) that is a good compromise between performance and complexity. Lower orders may more correlated quantization noise (i.e., tonal) where higher order modulators may have stability problems.

[46] Sigma-delta modulator 301 includes signal combiner (which may be referred as a summer) 302, modulator filter 303, and quantizer 304. As shown in Figure 3, signal combiner 302 subtracts the quantized output from quantizer 304 from the digital I signal from digital up converter 202 (as shown in Figure 2). While the digital I signal is depicted having M bits (e.g., 12 bits as shown in Figure 2) and the quantized I signal from quantizer 304 as having N quantized bits, signal-delta modulator 301 adjusts the number of bits from quantizer 304 to match the number of bits associated with the digital I signal so that signal combiner 302 can subtract the two numbers. For example, when the number of quantized bits equals N, the number of quantized states equals 2 ^N , where the number of bits of the digital I signal may be reduced to match the number of bits from quantizer 304.

[47] Sigma-delta modulator 301 executes in discrete time and thus may be implemented in digital logic. When the number of quantizer bits is chosen to be one (i.e., N=l), the design of low resolution DAC 306 which interfaces at the output of sigma-delta modulator 301 is simplified (since it has only 2 quantized states), and standard digital logic I/O may be used to implement the low resolution DAC as shown in Figure 5. Even when the number of quantizer states from sigma-delta modulator 301 is greater than two, several digital I O circuits may be combined to create more than three states. With the incorporation of sigma-delta modulator 301 and DAC 306 within the same electronic device, the associated cost may be significantly reduced.

[48] Figure 4 shows a block diagram sigma-delta modulator 401 used as an oversampling noise-shaping modulator in accordance with aspects of the disclosure, where block diagram 401 is an alternative embodiment of sigma-delta modulator 203 as shown in Figure 2.

[49] Hf(z), which is the transfer function of modulator filter 405, and the number of quantizer bits associated with quantizer 403, are the primary tunable parameters of sigma-delta modulator 401.

[50] The transfer function Hf(z) of modulator filter 405 may be determined from the

transfer function (NTF) and the signal transfer function (STF) by:

NTF = Y(z)/N(z) = 1 - Hf(z) (EQ. 5)

[51] For example, a second order filter transfer function Hf(z) when NTF = (1-z ¹ ) ² = 1 - 2z + z ^"2 by:

Hf(z) = (l - NTF) (EQ. 6)

[52] Sigma-delta modulator 401 includes first signal combiner (summer) 402, N-bit quantizer 403, second combiner (summer) 404, and modulator filter 405. First signal combiner 402 adds a filtered signal from modulator filter 405 and the digital I signal from digital up converter 202 (as shown in Figure 2). Second signal combiner 404 then subtracts the quantized output from the output of first signal combiner 402.

[53] In concert with the previous discussion, signal-delta modulator 401 adjusts the number of bits from quantizer 403 to match the number of bits associated with the digital I signal from digital up converter 202 (as shown in Figure 2).

[54] While some embodiments may incorporate a second order sigma-delta modulator, other embodiments may incorporate an N order sigma-delta modulator, where the order is greater than or less than two. A higher order modulator may increase the in-band signal to noise ratio (SNR).

[55] While sigma-delta modulators 301 and 401 (as shown in Figures 3 and 4, respectively) may comprise a single stage, other embodiments may utilize a multi-stage noise shaping (MASH) configuration, where first order sigma-delta modulators are cascaded to form higher order noise shaping. While a higher order single stage sigma-delta modulator may incur instability characteristics, stability is assured with a multi-stage first order sigma-delta modulator configuration because each first order loop is stable.

[56] Figure 5 shows a block diagram for a low resolution digital-to-analog converter (DAC) 204 in accordance with aspects of the disclosure. DAC 204 provides a differential output from non-inverted output 551 and inverted output 552. Non-inverted output 551 and inverted output 552 are obtained from registers 501 and 502, respectively, where the registers are clocked by DAC clock 208 (as shown in Figure 2), and the input to register 502 is inverted by inverter 503.

[57] While DAC 204 can support two quantizer states (i.e., output 551 equal Ί '/output 552 equal '0' and output 551 equal O'/output 552 equal T) corresponding to one quantizer bit, DAC 204 may further support a third state by activating a high impedance state of buffers 504 and 505. With tristate buffers, the third state is a Hi-Z (high impedance) state. When each of the output buffers is at high-Z, and the external circuit doesn't create a bias, the differential output (y(t) = P1-P2) will be 'Ο'. So the collection of differential states is +1,-1, and 0. This approach allows one more level (3 states compared to 2 states) for the quantizer, which may benefit the operation of the sigma- delta modulator. [58] If the input node to the active filter (when filter 209 or filter 210 comprises an active filter) is a summing node, then multiple different input signals may be summed together before the active filter. When implementing a binary weighed DAC or so called "R- 2R" DAC, multiple signals may be connected through resistors to a summing node (which may be inherent in the active filter).

[59] Figure 6 shows low pass second order spectral density response 600 of sigma-delta modulator 203 in accordance with aspects of the disclosure. However, the corresponding response for digital-analog transformation circuit 213 (i.e., sigma-delta modulator 203 in tandem with DAC 204 as shown in Figure 2) may be similar with the incorporation of zero-order hold interpolation, in which digital-analog transformation circuit 213 shapes the out-of-band quantization noise. Figure 6 shows a power spectral density plot of a low pass 2 ^nd order single bit sigma-delta modulator with a full scale tone and an over sampling ratio = 960.

[60] Baseband filters 209 and 210 (as shown in Figure 2) remove the increased out-of-band noise and thus requiring more aggressive filtering requirements than if a typical Nyquist DAC were used (e.g., the high speed current steering DAC used in traditional systems)

[61] Baseband filtering requirements of filters 209 and 210 are typically dependent on the target application and other system parameters. For example, increasing the over- sampling ratio (OSR) of sigma-delta modulator 203 and DAC 204 by a factor of two may move the baseband filter corner out by a factor of two. Extremely efficient resistor-capacitor (RC), inductor-capacitor (LC), and active filters may be designed depending on the requirements. When corner frequencies approach 1 MHz and below, active filtering typically becomes favorable due to the large inductor sizes in LC filters.

[62] Figure 7 shows a zoomed version 700 of the spectral density shown in Figure 6 in accordance with aspects of the disclosure. While Figure 6 shows the spectral density over 12 MHz, zoomed version 700 spans 2 MHz. A typical bandwidth for a wireless microphone channel is approximately 200 KHz, where the I and Q components have meaningful information between 0 and 100 KHz. Consequently, the high fidelity region is between 0 and 100 KHz, which is at the left side of plot 700. The rest of the signal energy (i.e., at frequencies greater than 100 KHz) may be filtered out by filters 209 and 210.

[63] Figure 8 shows block diagram 800 of a discrete quadrature modulator (e.g., analog quadrature modulator 212 as shown in Figure 2) in accordance with aspects of the disclosure.

[64] With traditional systems, analog quadrature modulators are typically found as integrated circuits from several manufacturers. Most of the available modulators target cellular infrastructure markets where high performance (and therefore high power) is needed. Additionally, the frequency bands for cellular communications are not typically in the UHF (470 MHz - 900 MHz) bands. For example, a traditional quadrature modulator has a power consumption if approximately 126 mW while the discrete quadrature modulator has a power consumption of approximately 36 mW. This translates to a measurable savings in battery life (nearly 2 hours for some wireless microphone systems).

[65] The main components of discrete quadrature modulator 800 are extremely power efficient double balanced mixers 801 and 802 and 90-degree phase splitter 803. However, other mixers (e.g., active mixers, passive mixers, single balanced, etc.) may be incorporated in some embodiments. If it is desirable to attenuate the local oscillator (LO) component 805 at the RF port of the mixer, a balanced mixer should be considered. The LO rejection of quadrature modulator 800 is related to how well each of the mixers 801 and 802 themselves reject the LO signal. Consequently, the quadrature combining does not cancel the LO component signals. Because quadrature modulator 800 has a discrete configuration, the bias point of each mixer 801 and 802 (LO drive level for passive mixers) may be tuned to the specific application, and therefore a relation between mixer performance and power consumption exists.

[66] Discrete summer 804 combines the mixer outputs from mixers 801 and 802 to form an RF output signal corresponding to RF output 257 as shown in Figure 2.

[67] With some embodiments, phase splitter 803 is a passive phase splitter, often reducing cost. There are different ways to construct a passive phase splitters, each having associated characteristics. One important parameter of phase splitter 803 is phase balance, which defines the operating bandwidth of the phase splitter. The amplitude balance is also important but typically to a lesser degree as the mixer gains are desensitized to varying LO drive levels.

[68] While some embodiments support at least some of the components in a discrete form, a plurality of the components may be contained in a same electronic device for other embodiments.

[69] Figure 9 shows apparatus 900 processes and input signal and transmits the processed signal over a wireless channel to wireless receiving and signal processing equipment in accordance with aspects of the disclosure. Processing device 901 may execute computer executable instructions from a computer-readable medium, for example, memory 903 in order perform a data transmission process (any or all of the transmission processes described herein). Computer storage media may include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media include, but may not be limited to, random access memory (RAM), read only memory (ROM), electronically erasable programmable read only memory (EEPROM), flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by processing device 901. The executable instructions may carry out any or all of the method steps described herein.

[70] With some embodiments, processing device 901 may comprise one or more processors.

For example, processing device 901 may include a digital signal processor (DSP) or other microprocessors utilizing one or more cores to implement one concealment technique while another microprocessor may perform another concealment technique.

[71] With some embodiments, apparatus 900 may be implemented as one or more processing devices providing non-sequential and/or parallel processing such as programmable logic devices (PLDs), field-programmable logic arrays (FPGAs), application specific integrated circuits (ASICs), or other integrated circuits having instructions or logical processing for performing operations as described in connection with one or more of any of the embodiments described herein. Said instructions may be software and/or firmware instructions stored in a machine-readable medium and/or may be hard-coded as a series of logic gates and/or state machine circuits in one or more integrated circuits and/or in one or more integrated circuits in combination with other circuit elements.

While the invention has been described with respect to specific examples including present modes of carrying out the invention, those skilled in the art will appreciate that there may be numerous variations and permutations of the above described systems and techniques that fall within the spirit and scope of the exemplary embodiments of the invention as set forth in the appended claims.