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Title:
WIRING STRUCTURE AND SPUTTERING TARGET
Document Type and Number:
WIPO Patent Application WO/2012/074046
Kind Code:
A1
Abstract:
This wiring structure comprises at least a gate insulating film and an oxide semiconductor layer both formed on a substrate, wherein the oxide semiconductor layer is a laminate comprising a first oxide semiconductor layer composed of at least one element selected from the group consisting of In, Ga, Zn and Sn (an element of Group Z) and a second oxide semiconductor layer containing at least one element selected from the group consisting of In, Ga, Zn and Sn (an element of Group X) and at least one element selected from the group consisting of Al, Si, Ti, Hf, Ta, Ge, W and Ni (an element of Group Y), and wherein the second oxide semiconductor layer is formed between the first oxide semiconductor layer and the gate insulating film. The present invention provides a wiring structure having good switching properties and good stress resistance, and particularly having a small amount of change in threshold voltages before and after the application of a stress and therefore having excellent stability.

Inventors:
MORITA SHINYA
MIKI AYA
YASUNO SATOSHI
KUGIMIYA TOSHIHIRO
Application Number:
PCT/JP2011/077789
Publication Date:
June 07, 2012
Filing Date:
December 01, 2011
Export Citation:
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Assignee:
KOBE STEEL LTD (JP)
MORITA SHINYA
MIKI AYA
YASUNO SATOSHI
KUGIMIYA TOSHIHIRO
International Classes:
H01L29/786; C23C14/34; H01L21/363
Domestic Patent References:
WO2009034953A12009-03-19
WO2010119952A12010-10-21
Foreign References:
JP2010074061A2010-04-02
JP2010070410A2010-04-02
JP2008277326A2008-11-13
Attorney, Agent or Firm:
UEKI, Kyuichi et al. (JP)
Hisakazu Ueki (JP)
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