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Patent Searching and Data


Title:
WIRING SUBSTRATE, METHOD FOR MANUFACTURING WIRING SUBSTRATE, AND VIA PASTE
Document Type and Number:
WIPO Patent Application WO/2012/098619
Kind Code:
A1
Abstract:
This multilayer wiring substrate has via hole conductors. The via hole conductors contain a metal part and a resin part. The metal part has a first metal region that contains a copper-particle connector forming a pathway that electrically connects first wiring and second wiring, a second metal region having a metal selected from a group formed from tin, tin-copper alloys, and tin-copper intermetallic compounds as a primary component, a third metal region having bismuth as a primary component, and a fourth metal region that is tin-bismuth solder particles. The copper particles that form the connector form a surface contact part wherein the surfaces of the particles are in contact with each other. At least part of the second metal region is in contact with the first metal region, and the tin-bismuth solder particles are surrounded by and scattered in the resin part.

Inventors:
HIRAI, Shogo (())
平井 昌吾 (())
HIMORI, Tsuyoshi (())
檜森 剛司 (())
ISHITOMI, Hiroyuki (())
石富 裕之 (())
Application Number:
JP2011/007070
Publication Date:
July 26, 2012
Filing Date:
December 19, 2011
Export Citation:
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Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真1006番地 Osaka, 〒5718501, JP)
KYOTO ELEX CO., LTD (1 Oogawaracho, Kisshoin Minami-ku, Kyoto-sh, Kyoto 91, 〒6018391, JP)
京都エレックス株式会社 (〒91 京都府京都市南区吉祥院大河原町1番地 Kyoto, 〒6018391, JP)
HIRAI, Shogo (())
平井 昌吾 (())
HIMORI, Tsuyoshi (())
檜森 剛司 (())
International Classes:
H05K1/11; H01B5/00; H05K1/09; H05K3/40; H05K3/46
Attorney, Agent or Firm:
ISHII, Kazuo et al. (Kitahama-Yamamoto Building, 3-6 Kitahama 2-chome,Chuo-ku, Osaka-shi, Osaka 41, 〒5410041, JP)
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Claims: