Title:
WIRING SUBSTRATE, OPTICAL SEMICONDUCTOR ELEMENT PACKAGE, AND OPTICAL SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/131092
Kind Code:
A1
Abstract:
This wiring substrate has signal conductor wiring positioned on a first surface of a first dielectric layer, and has a ground conductor layer positioned on a second surface thereof. When seen from a planar view, the ground conductor layer region where a first end section of the signal conductor wiring is positioned is notched inward from a first side of the second surface that corresponds to a first side of the first surface.
Inventors:
KITAMURA TOSHIHIKO (JP)
Application Number:
PCT/JP2017/002745
Publication Date:
August 03, 2017
Filing Date:
January 26, 2017
Export Citation:
Assignee:
KYOCERA CORP (JP)
International Classes:
H01L23/02; H01L23/04; H01L23/12; H01L31/02; H01S5/0239
Foreign References:
| JP2012222079A | 2012-11-12 | |||
| JP2003249596A | 2003-09-05 | |||
| JP2009158511A | 2009-07-16 | |||
| US20160240494A1 | 2016-08-18 |
Other References:
See also references of EP 3410471A4
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