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Patent Searching and Data


Matches 1 - 50 out of 9,240

Document Document Title
WO/2022/167522A1
The invention relates to a method for simulating an experience of comfort in a room (2), comprising the following steps: creating a digital model A of the room (2); defining indoor and/or outdoor conditions YR, XR which act on the room; ...  
WO/2022/153882A1
This neuron element comprises: a first charge storage unit in which charge is stored by an input signal; and a signal processing unit that, if the charge stored in the first charge storage unit exceeds a first prescribed amount, outputs ...  
WO/2022/139794A1
A clinical diagnostic analyzer for performing an automated crossover study on quality control (QC) material includes a processor, memory, measurement hardware, and an input panel/display. The analyzer prompts a user to load a QC specimen...  
WO/2022/136017A1
There is provided a linearized multiplier configured to produce an output current representing a product of a first input voltage and a second input voltage, comprising: a first transconductance stage which is configured to input the fir...  
WO/2022/137581A1
The present invention designs the routing of cables mounted on an apparatus in advance. A cable simulator (165) calculates, for each of partial cables (341, 342, 343), the behavior of a subject corresponding to the partial cables by usin...  
WO/2022/138463A1
A convolution operation device according to one aspect of the present disclosure comprises a plurality of cells which are arranged in a matrix shape and each of which comprises: a transistor; and a ferroelectric capacitor connected to fi...  
WO/2022/132304A1
An RF summer circuit (20) comprises first and second ports (P1, P2) coupled by first and second resistances (R1, R2), respectively, to a junction (22). The RF summer circuit further comprises a series combination of a third resistance (R...  
WO/2022/125115A1
An example computing device comprises a memory storing software, and a processor to, identify an expected parameter value range of a plurality of expected parameter value ranges of a hardware component of the computing device, the expect...  
WO/2022/118305A1
Aspects of some embodiments of the invention relate to systems and methods for simulating an ultrasound, comprising a camera, a physical tridimensional reference element attached to an ultrasound transducer of an ultrasound device and a ...  
WO/2022/112285A1
The invention relates to a method for monitoring the operation of a pump station (1), wherein the pump station (1) comprises a tank (6) for temporary storage of a liquid, an inlet (7) for influent liquid, an outlet (8), and at least one ...  
WO/2022/106955A1
The present invention provides: a transistor which has a large S value; and a semiconductor device which carries out a calculation by utilizing an operation of a transistor in the subthreshold region. A transistor which comprises: an oxi...  
WO/2022/103866A1
A group of wells may be located within a region of interest. Multiple scenarios of boundary locations within a group of wells may be obtained. A top-and-base boundary pair, defining a package of interest, may be identified within the ind...  
WO/2022/103863A1
A well may be selected from a group of wells. Multiple scenarios of boundary locations within the selected well may be determined based on propagation of boundaries from other wells to the selected well. A visual representation of the mu...  
WO/2022/102430A1
The present disclosure relates to a semiconductor device configured so as to be capable of reducing energy consumption. Provided is a semiconductor device comprising an input unit that inputs a charge, a computation unit that stores and ...  
WO/2022/104223A1
Parallelization and pipelining techniques that can be applied to multi-core analog accelerators are described. The techniques descried herein improve performance of matrix multiplication (e.g., tensor-tensor multiplication, matrix-matrix...  
WO/2022/103801A1
An intermediary well may be selected for a group of wells. The intermediary well may be used as an origin point from which branching wells paths are generated to connect the group of wells through the intermediary well. A shortest path b...  
WO/2022/091794A1
A neuromorphic device (300) for updating a weight between a first neuron (301) and a second neuron (303) that are interconnected. The neuromorphic device (300) is provided with a memdevice (302) having an electric characteristic that ind...  
WO/2022/086487A1
A vehicle control system includes a plurality of ride height sensors, a brake system and a controller. The ride height sensors may determine ride height information associated with individual wheels of a vehicle. The brake system may app...  
WO/2022/077424A1
A method and a device for providing transformer data, a storage medium, a processor, a terminal and a computer program product are provided. The method for providing transformer data comprises: obtaining, from a database, a predetermined...  
WO/2022/080229A1
A 3-dimensional electrical element 10 comprises four or more non-linear parts 11, each exhibiting non-linear current-voltage characteristics, and conductors 12 connecting the non-linear parts 11, and the non-linear parts 11 are arranged ...  
WO/2022/076410A1
Fast and stable methods are provided for estimating contact forces at multiple contact patches for multi-contact interactions between a robot and objects in its environment. Additionally, the estimated contact forces are physically consi...  
WO/2022/076849A1
Methods, systems, and media for simulating movement data of pedestrians in a district are provided. The method includes receiving a district plan for a proposed district, determining a number of users that would populate a building in th...  
WO/2022/063658A1
The invention relates to: a scalar product circuit for calculating a binary scalar product of an input vector with a weight vector; and an associated method. The scalar product circuit comprises one or more adders and at least one matrix...  
WO/2022/058838A1
The purpose of the present invention is to provide a low power consumption semiconductor device. This semiconductor device comprises a first transistor, a second transistor, and capacitances. The first transistor has a first gate and a f...  
WO/2022/055619A1
One embodiment is a method for estimating an internal temperature of a battery, the method comprising obtaining multiple terminal impedance measurements, wherein each of the terminal impedance measurements is taken at a different one of ...  
WO/2022/043077A1
The invention relates to an electricity metering circuit for a matrix operation circuit, having a circuit input for an electrical input current that is an output current of the matrix operation circuit. The electricity metering circuit i...  
WO/2022/040225A1
The present disclosure relates to systems and methods for improved training of machine learning systems. The system includes a local software application executing on a mobile terminal (e.g., a smart phone or a tablet) of a user. The sys...  
WO/2022/040399A1
An apparatus formulates a scheduling optimization problem for controlling the operation of an electric vehicle between multiple operating states based at least in part on battery status information of the electric vehicle, decomposes the...  
WO/2022/029542A1
The present invention provides a novel semiconductor device. The present invention uses a comparison unit for comparing two current values, a control unit, and a current output type digital-analog conversion unit to convert an analog sig...  
WO/2022/029541A1
Provided is a semiconductor device having a novel configuration. This semiconductor device includes a digital calculator, an analog calculator, a first memory circuit, and a second memory circuit. The analog calculator, the first memory ...  
WO/2022/029532A1
Provided is a semiconductor device having high computing power. A semiconductor device using the translinear principle, the semiconductor device having: first to tenth transistors each including a channel formation region that has a meta...  
WO/2022/026879A1
In a method of generating a geomechanical model of a wellbore, at least one vibration sensor (422) is affixed to a drill bit unit (420). Electronic drilling recorder data (412) regarding drilling of the wellbore is received. Bit vibratio...  
WO/2022/020495A1
A method of waterflood management for reservoir(s) having production hydrocarbon-containing well(s) including injector well(s). A reservoir model has model parameters in a mathematical relationship relating a water injection rate to a to...  
WO/2022/013680A1
Provided is a semiconductor device with which convolution processing is possible with low power consumption. In this semiconductor device, a first circuit has a first holding unit and a first transistor, and a second circuit has a second...  
WO/2022/013676A1
Provided is a semiconductor device that restores corrupted data. This semiconductor device comprises a first circuit, a memory unit, and a calculation unit, wherein the first circuit has a current source and a first switch, the memory un...  
WO/2022/013677A1
Provided is a semiconductor device having a novel configuration. A first memory circuit part has a first memory circuit that holds a plurality of pieces of first weight data. A second memory circuit part has a second memory circuit that ...  
WO/2022/010927A1
System and methods for material dataflow extraction and simulation for bottom-up physical input-output table (PIOT) generation is provided. The system may receive an engineering model and an industry classification. The system may determ...  
WO/2022/003957A1
An accumulation apparatus (200) according to an embodiment of the present invention comprises a substrate (Sb) and a laminate structure (LS) that is laminated on the substrate. The laminate structure is provided with a first element grou...  
WO/2021/262023A1
Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural netw...  
WO/2021/256197A1
This brain-type information processing device has an analog resistance changing element composed of a pair of electrodes and an oxide layer provided between the pair of electrodes, and a drive circuit that superimposes and supplies volta...  
WO/2021/247202A1
An integrator circuit includes: an operational amplifier; a first capacitor coupled to an input of the operational amplifier; a second capacitor coupled in parallel to the first capacitor so that a first terminal of the first capacitor i...  
WO/2021/243097A1
Embodiments herein describe systems and methods to predict biomolecule-ligand complexes and uses thereof. Many embodiments generate candidate poses and docking scores for ligands known to interact with a target protein as well as a candi...  
WO/2021/237362A1
An integrated circuit and a method for operating the integrated circuit to perform quantum analog computing. The integrated circuit comprises a plurality of qubits connected to each other, each qubit of the plurality of qubits comprising...  
WO/2021/234780A1
The objective of the present invention is to reduce a circuit scale. An oscillation circuit (1) includes diodes (D1, D2, D3), inductors (L1, L2), and a power supply unit (V1). The diodes (D1, D2, D3) are non-linear passive elements hav...  
WO/2021/231457A1
2D slices/images may be extracted from a three-dimensional volume of subsurface data. Image comparison analysis across sequential 2D slices/images may identify boundaries within the corresponding subsurface region, such as changes in sty...  
WO/2021/228757A1
The invention relates to a method for the analogue multiplication and/or calculation of a scalar product with a circuit assembly, which has a series circuit formed by a first FET and a second FET or FET array functioning as a power sourc...  
WO/2021/229320A1
A computer-implemented method is presented for performing matrix sketching by employing an analog crossbar architecture. The method includes low rank updating a first matrix for a first period of time, copying the first matrix into a dyn...  
WO/2021/229373A1
Provided is a semiconductor device having a small circuit surface area and low power consumption. This semiconductor device has first to fourth cells, a current mirror circuit, and first to fourth wirings, wherein each of the first to fo...  
WO/2021/226064A1
The present invention relates to systems and methods for personalized dosing of pharmacologic agents. In particular, the presently-disclosed subject matter relates to a computer-based system and method for personalized dosing of one or m...  
WO/2021/225716A1
A bit cell circuit of a most-significant bit (MSB) of a multi-bit product generated in an array of bit cells in a compute-in-memory (CIM) array circuit is configured to receive a higher supply voltage than a supply voltage provided to a ...  

Matches 1 - 50 out of 9,240