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WO/2023/219898A1 |
A deep neural network circuit with multiple layers formed of multi-terminal logic gates is provided. In one aspect, the neural network circuit includes a plurality of logic gates arranged into a plurality of layers and a plurality of log...
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WO/2023/209485A1 |
Provided is a semiconductor device having a small circuit size and reduced power consumption. This semiconductor device includes first to fifth circuits. Each of the first to fourth circuits has first and second cells, a sixth circuit, f...
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WO/2023/212463A1 |
Systems and methods for characterizing an interaction between a compound and a polymer include obtaining a plurality of sets of atomic coordinates. Each set of atomic coordinates comprises the compound bound to the polymer in a correspon...
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WO/2023/203431A1 |
Provided is a semiconductor device that has a small circuit scale and in which power consumption is reduced. The semiconductor device has first to fourth cells, first and second circuits, and first to fourth current generation circuits. ...
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WO/2023/170816A1 |
This magnetic array comprises: a plurality of magnetoresistance effect elements; and a pulse application device that applies a pulse to at least one of the plurality of magnetoresistance effect elements. Each of the plurality of magnetor...
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WO/2023/171406A1 |
A neural network computation circuit for outputting output data (y) in accordance with the result of sum-of-product computation of input data (x1 to xn) and connection weight coefficients (w1 to wn), wherein a computation circuit unit (P...
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WO/2023/171683A1 |
This neural network arithmetic circuit holds a plurality of coupling weight coefficients corresponding respectively to a plurality of input data pieces, and outputs output data in accordance with the results of product-sum operations bet...
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WO/2023/167244A1 |
The present invention utilizes an electric characteristic due to an electrochemical reaction corresponding to an environmental factor. An interconnection structure according to an embodiment of the present disclosure electrically connect...
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WO/2023/167115A1 |
In modern computing, the reference for calculating storage capacity is bits, the number of transistors (elements) that become a node, namely, the number of bits is a unit of a modern information communication quantity. On the contrary, a...
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WO/2023/167916A1 |
An system and/or method for detecting outliers in satellite observations can include: receiving satellite observations associated with one or more satellite constellations; receiving sensor data; determining a GNSS positioning solution u...
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WO/2023/158684A1 |
Techniques of automated quality control for digital pathology whole slide images are presented. The techniques include obtaining a thumbnail image derived from a whole slide image of a pathology slide; determining whether the whole slide...
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WO/2023/157694A1 |
The present invention realizes an optical arithmetic device capable of performing more various optical arithmetic operations than conventional optical arithmetic devices. An optical arithmetic device (1) comprises: an image sensor (12ai)...
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WO/2023/148580A1 |
Provided is a method for operating a semiconductor device that performs data writing and correction processing. The present invention is a method for operating a semiconductor device that includes a control circuit, a first circuit, a se...
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WO/2023/146804A1 |
Methods, systems, and non-transitory computer readable media for estimating well interference on a target well from other potential wells in a subsurface volume of interest are disclosed. Exemplary implementations may include: obtaining ...
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WO/2023/146523A1 |
A system is described that comprises a memory for storing data representative of at least one kernel, a plurality of spiking neuron circuits, and an input module for receiving spikes related to digital data. Each spike is relevant to a s...
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WO/2023/137385A1 |
A computation node comprises an input, an output, a bistable node, comprising an input and an output, the output configured to have at least two equilibrium output voltages, a first buffer circuit, having an input and an output, the buff...
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WO/2023/136767A1 |
Method for performing a transaction between a second client (21,22,23) and a first client (131,132,133), comprising defining a transaction, including a payment amount; the first client sending the transaction to a central server (110,111...
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WO/2023/128993A1 |
The invention is the dive computer (100) comprising a pressure sensor (180), a screen (130), and a processor unit (110) configured to control the said screen (130) and receive pressure measurements from the said pressure sensor (180). Ac...
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WO/2023/120723A1 |
A nonlinear function computing device according to one embodiment of the present invention comprises: a nonlinear operation unit, the internal physical quantity of which autonomously changes in accordance with a prescribed nonlinear char...
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WO/2023/114893A1 |
Methods for assessing the effectiveness of an acid stimulation operation in a hydrocarbon well are described herein. The methods use encapsulated tracer particles comprising a tracer material that is coated with a calcium carbonate shell...
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WO/2023/112674A1 |
Provided is an artificial intelligence processing device (200) that uses variable resistance non-volatile storage elements, wherein: a first variable resistance non-volatile storage element (10) and a second variable resistance non-volat...
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WO/2023/106249A1 |
A module circuit comprises a first block circuit and a second block circuit. The first block circuit is provided with a first input terminal to which an input pulse signal is inputted, a holding unit that holds an average value of the in...
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WO/2023/100490A1 |
A computation device according to one embodiment of the present disclosure comprises a memory cell array including a plurality of memory cells that each comprise: a first inverter having a first input unit and a first output unit; a seco...
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WO/2023/089635A1 |
A navigation planning method and a navigation planning system to facilitate navigation planning for vehicles is provided. The navigation planning method includes reception, by a processor, an output that indicates semantic information an...
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WO/2023/074798A1 |
A device for executing a spiking neural network, wherein: spike data input to the device is constituted from a plurality of spikes; the device comprises circuits (301, 302) that generate a membrane potential displacement relative to each...
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WO/2023/063916A1 |
The invention relates to a content management system that allows new versions to be uploaded and published in a practical way without the need for a new version installation (without re-deployment) on web provider servers or application ...
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WO/2023/047228A1 |
Provided is an electronic device having a novel configuration. This electronic device has a semiconductor device having a CPU, an accelerator, and a memory device. The CPU has a scan flip-flop circuit, and a backup circuit electrically c...
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WO/2023/032158A1 |
A computing device that comprises a spiking neural network that includes an accumulation phase that adds up currents and a decoding phase that converts a voltage, resulting from the adding up, to a voltage pulse timing. The spiking neura...
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WO/2023/026946A1 |
In order to implement an optical operation device which can execute a bidirectional optical operation, this optical operation device (1) comprises an optical modulation element group (11) composed of one or more optical modulation elemen...
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WO/2023/023475A1 |
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for predicting the time to vaginal delivery of an infant. In one aspect, a method comprises: obtaining patient data characterizing a patie...
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WO/2023/285940A1 |
It is provided a multi-purpose analogue device (1) for tracing curves and geometric transformations comprising a first guide (3) defining a first translation axis (3a) and movable on a tracing plane along a predetermined direction perpen...
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WO/2023/276707A1 |
A spiking neuron circuit system 100 includes: a charging circuit 10 that, when an input voltage is applied, starts charging of a capacitor 12 by an output current I of a field effect transistor 11; a pulse generation circuit 20 that gene...
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WO/2022/269660A1 |
This drive circuit comprises: a load resistor; a resistance changing element having at least a first terminal and a second terminal, and capable of changing a resistance value; and a constant current source that decides the magnitude of ...
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WO/2022/267035A1 |
A control method for a vehicle, the method comprising: acquiring information of a target object located within a preset range of a target driving path, and a first predicted passageway of a vehicle, wherein the first predicted passageway...
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WO/2022/266626A1 |
Disclosed herein are methods and systems for using molecular dynamics simulation results as training datasets for machine-learning models that can provide predictions of cyclic peptide structural ensembles.
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WO/2022/258192A1 |
There is provided an analog circuit comprising: a plurality of analog functions, which are divided into at least two groups of analog functions, and an interconnection structure configured to interconnect the plurality of analog function...
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WO/2022/250707A1 |
A goal of this invention is to minimize the cost of shifting a circadian state or entraining a state to a target cycle by identifying a preferred zeitgeber stimulus. Another goal of this invention is to provide a method to determine a pe...
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WO/2022/248963A1 |
Provided is a new semiconductor device. In reservoir computing using an input layer, a reservoir layer, and an output layer, the present invention uses variation among threshold voltages of transistors as a weight for use in a product ar...
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WO/2022/230674A1 |
Provided is a computation processing device that can further reduce power consumption. A computation processing device 10 performs computation processing based on a convolutional neural network. A memory unit 15 includes a first storage ...
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WO/2022/228883A1 |
Techniques are provided to implement hardware accelerated computing of eigenpairs of a matrix. For example, a system includes a processor, and a resistive processing unit coupled to the processor. The resistive processing unit includes a...
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WO/2022/192579A1 |
A method includes receiving, from a first mobile device associated with a first vehicle, first data related to a first event involving the first vehicle, receiving, from a second mobile device associated with a second vehicle, second dat...
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WO/2022/192800A1 |
A computer program product is provided. The computer program product includes processor executable code for an integration tracking engine. The processor executable code is stored on a non-transitory computer readable medium. The process...
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WO/2022/185153A1 |
Provided is a semiconductor device having a novel configuration. This semiconductor device comprises a cell array which performs multiply-add operations in a first layer and multiply-add operations in a second layer in an artificial neur...
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WO/2022/182975A1 |
A method includes determining, by a computer processor coupled to memory, data associated with a patient, the data comprising a heart rate value, a peak velocity through aortic valve value, and a stroke volume value; generating a flow wa...
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WO/2022/167522A1 |
The invention relates to a method for simulating an experience of comfort in a room (2), comprising the following steps: creating a digital model A of the room (2); defining indoor and/or outdoor conditions YR, XR which act on the room; ...
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WO/2022/153882A1 |
This neuron element comprises: a first charge storage unit in which charge is stored by an input signal; and a signal processing unit that, if the charge stored in the first charge storage unit exceeds a first prescribed amount, outputs ...
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WO/2022/139794A1 |
A clinical diagnostic analyzer for performing an automated crossover study on quality control (QC) material includes a processor, memory, measurement hardware, and an input panel/display. The analyzer prompts a user to load a QC specimen...
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WO/2022/136017A1 |
There is provided a linearized multiplier configured to produce an output current representing a product of a first input voltage and a second input voltage, comprising: a first transconductance stage which is configured to input the fir...
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WO/2022/137581A1 |
The present invention designs the routing of cables mounted on an apparatus in advance. A cable simulator (165) calculates, for each of partial cables (341, 342, 343), the behavior of a subject corresponding to the partial cables by usin...
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WO/2022/138463A1 |
A convolution operation device according to one aspect of the present disclosure comprises a plurality of cells which are arranged in a matrix shape and each of which comprises: a transistor; and a ferroelectric capacitor connected to fi...
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