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Patent Searching and Data


Matches 551 - 600 out of 661,464

Document Document Title
WO/2021/249046A1
A data access method, a controller, a memory, and a storage medium. The method comprises: receiving an access request sent by an application end, wherein the access request carries access addresses (S11); if any address included in the a...  
WO/2021/252016A1
The present disclosure generally relates to improved foggy-fine programming. The data can be written to SLC memory. Then, the data can be decoded and then both foggy and finely written to MLC. After the decoding, the data can be stored i...  
WO/2021/247333A1
Methods, systems, and devices for grouping power supplies for a power saving mode are described to configure a memory device with groups of internal power supplies whose voltage levels may be successively modified according to a group or...  
WO/2021/247670A1
A system and method of editing video content includes receiving input video data; converting the input video data to a predetermined format; generating a plurality of initial metadata values for a frame of the converted video data, the p...  
WO/2021/247083A1
A chip-to-chip interface of a multi-chip module (MCM), including: bidirectional data links for transmitting data signals and a direction indicator bit, wherein the direction indicator bit switches a direction of the bidirectional data li...  
WO/2021/243641A1
A three-dimensional memory architecture including a top cell array of memory cells, a bottom cell array of memory cells, a plurality of word lines coupled to the arrays, and a plurality of word line decoders coupled to the word lines and...  
WO/2021/247105A1
Aspects of a storage device including a memory and controller are provided which allow for erase voltages applied during erase operations to be adaptively changed at elevated temperatures to reduce erase time and prevent erase failures. ...  
WO/2021/246066A1
A non-linear optical material according to an aspect of the present disclosure is represented by formula (1). In formula (1), L1 to L3 are each independently represented by formula (2) or formula (3).  
WO/2021/246151A1
A glass substrate for magnetic recording media according to the present invention is characterized by being shaped like a disk, exhibiting a strain point of 695-780°C, exhibiting a temperature of not more than 1300°C at 104.5dPa•s, a...  
WO/2021/244080A1
A read-write conversion circuit and a memory. The read-write conversion circuit comprises: a first data line (Ldat) connected to a bit line (BL) via a column selection module (100), a first complementary data line (Ldat#) connected to a ...  
WO/2021/247261A1
A method (200) includes attaching (204) semiconductor dies to die attach pads of first and second columns of the lead frame; enclosing (208) the semiconductor dies of the respective columns in respective first and second package structur...  
WO/2021/244055A1
Some of embodiments of the present application relate to the technical field of semiconductors, and disclosed are a read-write conversion circuit and a memory. The read-write conversion circuit comprises: a read-write conversion module (...  
WO/2021/245768A1
An embodiment relates to a magnetoresistive element (100) comprising: a wire (30) extending in a first direction; a stack (10) including a first ferromagnetic layer (11) connected to the wire; a first electrically conductive portion (40)...  
WO/2021/243742A1
A superconducting magnetic flux storage unit and a reading and writing method therefor. The superconducting magnetic flux storage unit comprises a storage loop, an addressing circuit, and a reading circuit. The storage loop comprises a f...  
WO/2021/247072A1
Various embodiments of tandem row decoders are disclosed. Each embodiment of a tandem row decoder comprises a word line decoder and a control gate decoder. The tandem row decoder exhibits reduced leakage current on the word line and the ...  
WO/2021/247804A1
An electronic device may include a main circuit including multiple sub-circuits powered by a direct-current (DC) power supply circuit. The main circuit has a main circuit current demand being a time-varying demand for a DC voltage-regula...  
WO/2021/244273A1
The present disclosure provides a reset control signal generation circuit, method and module, and a display device. The reset control signal generation circuit comprises a reset control signal output end, a first node control circuit, a ...  
WO/2021/244274A1
The present application relates to a differential signal offset calibration circuit and a semiconductor memory. The differential signal offset calibration circuit can obtain a phase relationship between differential signals by means of a...  
WO/2021/246825A1
A three-dimensional flash memory based on a ferroelectric material and an operating method thereof are disclosed, and a three-dimensional flash memory which performs a hole injection-based memory operation by a gate induced drain leakage...  
WO/2021/243563A1
Provided in the present invention are a lollipop capable of producing sound based on bone conduction, and a processing method and system, the lollipop capable of producing sound based on bone conduction comprising a shell, a trigger, a c...  
WO/2021/247176A1
A memory device with built-in flexible redundancy is provided according to various aspects. In certain aspects, a memory device includes a first sense amplifier, a second sense amplifier, a first comparator, a second comparator, a refere...  
WO/2021/247218A1
Processes, methods, systems, and devices are disclosed for synchronizing multiple wireless data streams captured in action by various sensors, with lost data recovery. For example, a source device may have multiple sensors acquiring data...  
WO/2021/241070A1
A semiconductor storage device according to one embodiment of the present disclosure comprises: two systems of power supply paths; and a connection path that connects the power supply paths. Each of the power supply paths includes a powe...  
WO/2021/241235A1
This non-contact communication medium comprises a processor and a memory built into or connected to the processor, and the medium conducts non-contact communication with an external communication device. The memory has a storage block th...  
WO/2021/240432A1
The present disclosure concerns a magnetic sensor (10) comprising a plurality of magnetoresistive elements (1); each magnetoresistive element comprising a ferromagnetic layer (21) having a magnetization (210) that is orientable at or abo...  
WO/2021/240203A1
The present disclosure provides a memory device and accessing/de- selecting methods thereof. The memory device comprises a memory layer including a vertical three-dimensional (3D) memory array of memory cells formed therein, wherein a me...  
WO/2021/242881A2
Multistate non-volatile photonic memory devices are disclosed. The photonic devices comprise phase change materials with broadband transparencies used to store discretized information with negligible losses in the 0 state. The photonic m...  
WO/2021/242455A1
A method is provided that includes displaying, by a computing device, representations of a plurality of stock videos to a user. The representations are at a still image, a partial clip, and/or a full play of the stock video. Each of the ...  
WO/2021/237730A1
Provided is a method for manufacturing a three-dimensional ferroelectric memory. The method can ensure the good endurance of a three-dimensional ferroelectric memory and can also reduce etching difficulty during the manufacturing of the ...  
WO/2021/237497A1
A magnetic random access memory, used for improving the memory density of the magnetic random access memory, and comprising multiple structural units (202) and multiple voltage control lines (203). The multiple voltage control lines (203...  
WO/2021/242341A1
Aspects of a storage device including a memory and a controller are provided which allow for reduction of current in open blocks during read operations using read voltage ramp rate control. The controller determines whether a block is op...  
WO/2021/237854A1
A shift register, a display panel and a display apparatus. The shift register (100) comprises n cascaded shift register units (ASG1-ASGn), wherein each shift register unit (ASG) comprises a shift module (10) and a plurality of enabling m...  
WO/2021/240019A1
The present disclosure relates to a video imaging device (10) comprising: at least one visual camera (11) comprising at least one visual image sensor sensitive to visible light and configured to capture a first scene (S) during a first c...  
WO/2021/242342A1
Aspects of a storage device including a memory and a controller are provided which allow for reduction of current during program operations using pre-charge ramp rate control based on an inhibit bit line count acquired from data latches....  
WO/2021/240359A1
System for the production of an audiovisual content (200) comprising one or more audiovisual sources (101a-101l) adapted to generate one or more audiovisual signals at a first quality level; at least one audiovisual processing apparatus ...  
WO/2021/242323A1
A spin torque oscillator includes a first electrode, a second electrode and a device layer stack located between the first electrode and the second electrode. The device layer stack includes a spin polarization layer including a first fe...  
WO/2021/238816A1
A data reading device and a data writing device, and a data reading method and data writing method. In the data reading device or the data writing device, an optical head array comprising a plurality of laser heads is provided to increas...  
WO/2021/242766A1
A memory controller interfaces with a dynamic random access memory (DRAM). The memory controller selectively places memory commands in a memory interface queue, and transmits the commands from the memory interface queue to a memory chann...  
WO/2021/239911A1
The invention relates to a device for implementing one or more logical operations according to one embodiment. Each of the one or more logical operations has one or more binary input variables and has a binary output value dependent on t...  
WO/2021/242340A1
Aspects of a storage device including a controller are provided which recovers misidentified bad blocks that fail to erase due to charge leakage from a previously programmed open block. The controller programs an open block, and attempts...  
WO/2021/238521A1
A nonvolatile memory-based storage method and apparatus, a nonvolatile memory-based data processing method, and equipment. The method comprises: obtaining a weight value needing to be stored in the nonvolatile memory (S101); if the nonvo...  
WO/2021/238838A1
A method and circuit for measuring the retention time of a time sequence unit. The method comprises: determining a first period value, a second period value and a third period value of a clock signal separately, wherein the first period ...  
WO/2021/237642A1
A method for data erase in a memory device. The method includes providing first erase carriers from a body portion for the memory cell string, during an erase operation in a memory cell string. The first erase carriers flow in a first di...  
WO/2021/242334A1
Techniques and apparatuses are provided for detecting a short circuit between pins of an integrated circuit package. The tested pins can be adjacent or non-adjacent on the package. Various types of short circuits can be detected, includi...  
WO/2021/239690A1
The present invention relates to a magnetic domain wall displacement type memory cell (racetrack memory device), comprising a Ad or 5 d metal dusting layer (DL) at the ferromagnetic/heavy metal interface of the ferromagnetic (FM) structu...  
WO/2021/241236A1
This non-contact communication medium is provided with a processor, and a memory built into or connected to the processor, and performs non-contact communication with an external communication device. The memory includes a storage block ...  
WO/2021/242587A1
Embodiments provide a fitness instruction program, e.g., video and/or audio, with licensed music. One such embodiment begins by receiving a music playlist including one or more metadata tags. The metadata tags correspond to time frames o...  
WO/2021/097710A9
A display substrate and a manufacturing method therefor, and a display device. The display substrate comprises: a base, and a gate driving circuit provided on the base. The gate driving circuit comprises: a frame start signal line (STV),...  
WO/2021/241319A1
The purpose of the present invention is to provide a magnetic recording medium which has good crystal orientation characteristics, while exhibiting high SNR. The present technology provides a magnetic recording medium which has a layered...  
WO/2021/241903A1
A three-dimensional flash memory for promoting integration, and a manufacturing method therefor are disclosed. The three-dimensional flash memory to which a cell on peripheral circuit (COP) structure is applied comprises: a substrate hav...  

Matches 551 - 600 out of 661,464