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Patent Searching and Data


Matches 351 - 400 out of 863,225

Document Document Title
WO/2020/264045A2
Apparatus and methods for enabling indexing and playback of media content before the end of a content capture. In one aspect, a method for enabling indexing of media data obtained as part of a content capture is disclosed. In one embodim...  
WO/2020/263316A1
Detecting a word line leakage in a non-volatile memory array. Various methods include: in a first step, enabling a M-bit "coarse" digital-to-analog converter (DAC) logic of an N-bit analog-to-digital converter (ADC) to, according to a cl...  
WO/2020/263314A1
In a non-volatile memory circuit, read and write performance is improved by increasing the transfer rate of data through the cache buffer during read and write operations. In an array structure where memory cells are connected along bit ...  
WO/2020/260847A1
In a particular implementation,a method of data conversion is disclosed. For example, for each word-line of a plurality of word-lines in a memory array, the method includes: 1) determining, by a digital comparator, if digital data exceed...  
WO/2020/263635A1
Capacitor structures including a first island of a first conductive region and a second island of the first conductive region having a first conductivity type, an island of a second conductive region having a second conductivity type dif...  
WO/2020/264349A1
A magnetic memory array having a source-plane electrically connected with an array of channel selectors in two-dimensions. The array of channel selectors can be arranged in rows and columns with both the rows and columns being electrical...  
WO/2020/259133A1
Disclosed in embodiments of the present disclosure are a method and device for recording a chorus section, an electronic apparatus, and a readable medium. The method comprises: generating a chorus section switch instruction according to ...  
WO/2020/258197A1
Three-dimensional (3D) memory devices are provided. An exemplary 3D memory device includes a 3D NAND memory array and an on-die data processing circuit coupled to the 3D NAND memory array on a same chip. The on-die data processing circui...  
WO/2020/261736A1
In the present invention, with regard to a selection element that is provided with a plurality of switch layers and that performs selection control in accordance with an applied voltage, the usage-possible period of the selection element...  
WO/2020/263335A1
An approach to identifying poorly performing data storage devices (DSDs) in a data storage system, such as hard disk drives (HDDs) and/or solid-state drives (SSDs), involves retrieving and evaluating a respective set of log pages, such a...  
WO/2020/263317A1
Methods for reducing read disturb using NAND strings with poly-silicon channels and p-type doped source lines are described. During a boosted read operation for a selected memory cell transistor in a NAND string, a back-gate bias or bit ...  
WO/2020/263315A1
A non-volatile storage device comprises non-volatile memory cells, clocked circuity, and one or more control circuits. The one or more control circuits are configured to process commands to access the non-volatile memory cells using the ...  
WO/2020/263642A1
Methods, systems, and devices for digit line management for a memory array are described. A memory array may include a plate that is common to a plurality of memory cells. Each memory cell associated with the common plate may be coupled ...  
WO/2020/259319A1
The present application provides a shift register unit, a gate driver circuit, a display device, and a control method. The shift register unit comprises a first input sub-circuit, a first output sub-circuit, a first reset sub-circuit, a ...  
WO/2020/263326A1
A source side programming method and system are provided. A bad trigger block, of a plurality of blocks of a memory array, may be detected by determining a threshold voltage distribution of a drain side select gate of a block and determi...  
WO/2020/263336A1
An approach to identifying problematic data storage devices, such as hard disk drives (HDDs), in a data storage system involves retrieving and evaluating a respective recovery log, such as a media error section of a device status log, fr...  
WO/2020/263322A1
The present disclosure generally relates to methods of operating storage devices. A controller of the storage device retrieves data of a first command a first time and performs a first pass programming of the data of the first command to...  
WO/2020/258821A1
A memory, comprising at least one storage unit. The storage unit comprises: a spin orbit torque providing line (10) comprising a first surface, wherein the first surface has a plurality of write regions; a plurality of storage structures...  
WO/2020/255801A1
Provided is a layout structure in which excellent characteristics are obtained with respect to a static random access memory (SRAM) cell in which a complementary FET (CFET) is used. The SRAM cell comprises transistors (PU1, PU2, PD1, PD2...  
WO/2020/256776A1
A MRAM memory cell comprises a SHE layer, a magnetic bit layer with perpendicular anisotropy and an Oersted layer. The magnetic bit layer has a switchable direction of magnetization in order to store data. Data is written to the MRAM mem...  
WO/2020/253789A1
The present application provides a shift register unit and a driving method therefor, and a gate driving circuit. The shift register unit comprises: an input circuit configured to receive an input signal from the input signal end, and ou...  
WO/2020/253837A1
Provided are a shift register unit and a driving method therefor, and a gate driving circuit. The shift register unit comprises: an adjustment circuit connected between an input signal end of a shift register unit and an input node and c...  
WO/2020/256857A1
Methods, systems, and devices for speculative memory section selection are described. Defective memory components in one memory section may be repaired using repair components in another memory section. Speculative selection of memory se...  
WO/2020/255656A1
A cell lower part has formed therein transistors (N3, N4) corresponding to a drive transistor (PD1), transistors (N5, N6) corresponding to a drive transistor (PD2), transistors (N7, N8) corresponding to an access transistor (PG1), and tr...  
WO/2020/256777A1
A perpendicular spin transfer torque MRAM memory cell includes a magnetic tunnel junction stack comprising a pinned layer having a fixed direction of magnetization, a free layer having a direction of magnetization that can be switched, a...  
WO/2020/255655A1
Transistors (N1-N12) respectively corresponding to drive transistors (PD1, PD2), access transistors (PG1, PG2), a read drive transistor (RPD1), and a read access transistor (RPG1), are formed at a cell lower section. Transistors (P1, P2)...  
WO/2020/256775A1
Various methods include receiving, by a controller, a temperature reading of a memory array, the temperature reading includes a temperature value; determining the temperature value is below a first threshold; in response, modifying a dur...  
WO/2020/255908A1
In order to address the issue of providing a seed layer alloy that can obtain a large-capacity magnetic recording medium having excellent corrosion resistance, this seed layer alloy for a magnetic recording medium includes: at least at l...  
WO/2020/257168A1
A reconfigurable neural circuit includes an array of processing nodes. Each processing node includes a single physical neuron circuit having only one input and an output, a single physical synapse circuit having a presynaptic input, and ...  
WO/2020/256766A1
Methods, systems, and media for providing dynamic media sessions are provided. In some embodiments, the method comprises: transmitting, from a leader device to follower devices that each belong to a group of media playback devices in a g...  
WO/2020/256165A1
The present invention relates to voltage-reference (VREF) training in a signal receiving system. A signal receiving device according to embodiments of the present invention comprises: a receiving unit for receiving a signal in a voltage-...  
WO/2020/255288A1
An acoustic device (4) is provided with a rotary operator (8) and a base part (6) that rotatably supports the rotary operator (8). The rotary operator (8) includes: a rotating body (81) that is disposed on the base part (6); a pressed pa...  
WO/2020/254905A1
A three-terminal device comprises a magnetic tunnel junction (MTJ) and a spin orbit torque (SOT) generating layer. The MTJ has a first magnetic layer, a tunnel barrier layer underlying the first magnetic layer, and a second magnetic laye...  
WO/2020/256945A1
A glass substrate includes about 45 mol% to about 70 mol % SiO2, about 15 mol % to about 30 mol% Al2O3, about 7 mol% to about 20 mol% of Y2O3, and optionally 0 mol% to about 9 mol% of La2O3. The glass substrate has high modulus and fract...  
WO/2020/257044A1
Methods, systems, and devices for a memory device with status feedback for error correction are described. For example, during a read operation, a memory device may perform an error correction operation on first data read from a memory a...  
WO/2020/255289A1
An acoustic device (4) that comprises a rotary operator (6) and a base part (8) that rotatably supports the rotary operator (6). The base part (8) comprises a braking part (83) that contacts the rotary operator (6) and applies braking fo...  
WO/2020/254914A1
The present invention addresses the issue of unifying power supply voltage output because, depending on the circuit being used for a device, the power supply voltage differs, which means that separate circuits for outputting at least two...  
WO/2020/256809A1
Physically unclonable functions response in memory cells is improved by transistor sizing, transistor threshold voltage (VT) and body bias in the memory cell to improve the reproducibility of the memory cell and multiple Sense Amplifiers...  
WO/2020/255997A1
An electronic apparatus 100 is provided with: a NAND flash memory device 130; a memory control unit 141 for issuing a data erase command or a data write command to the NAND flash memory device 130; and a voltage monitoring unit 142 for d...  
WO/2020/255448A1
A semiconductor storage device (20) includes a first magnetoresistive random access memory (21) and a second magnetoresistive random access memory (22) which are two types of magnetoresistive random access memories accessed by an designa...  
WO/2020/257067A1
Some embodiments include apparatuses having non-volatile memory cells, each of the non-volatile memory cells to store more than one bit of information; data lines, at most one of the data lines electrically coupled to each of the non-vol...  
WO/2020/251754A1
Methods, systems, and devices for memory cell biasing techniques are described. A memory cell may be accessed during an access phase of an access operation. A pre-charge phase of the access phase may be initiated. The memory cell may be ...  
WO/2020/251699A1
A memory circuit includes a memory array with one or more reference columns providing a reference signal and a data column providing a data signal when selected by a read operation. The memory circuit also includes a first circuit that r...  
WO/2020/251967A1
A video tagging system that can generate tags corresponding to associations of object- related keywords mentioned in a video to time instances in the video is described. The video tagging system identifies a particular object associated ...  
WO/2020/250935A1
[Problem] To provide: a jig for holding substrates for plating treatment use, which can hold a relatively large number of substrates while avoiding the contact between the substrates in a plating bath, has a simpler structure, and can pr...  
WO/2020/251756A1
Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activa...  
WO/2020/251819A1
In an embodiment, a method of emulating light sensitivity of a target includes, for each of at least some frames of a video recording, receiving an image. The method also includes accessing image metadata associated with the image. The m...  
WO/2020/250627A1
Provided is a magnetic disk, and in particular, a compound that can realize a lubricant exhibiting a high adsorption property and coatability with respect to a carbon protective film. A perfluoropolyether compound according to one aspect...  
WO/2020/251709A1
Both before and after a surprise clock stop, the apparatus and method of various embodiments supplies a stable and continuous clock to a memory module with a unique arrangement of circuit components, including a clock detector circuit, a...  
WO/2020/250208A1
The present disclosure relates to data storage device, more particularly to different types of devices which facilitates in capturing, storing, listing, editing, deleting & displaying and/or playing different types of user data, viz. tex...  

Matches 351 - 400 out of 863,225