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Matches 1 - 50 out of 570,639

Document Document Title
WO/2021/117936A1
Provided is a method of designing an MMIC power amplifier which enables: more accurate determination of stability of an MMIC power amplifier in which various oscillation phenomena occur; and enhancement of the stability. A stability dete...  
WO/2021/115147A1
A buffer apparatus, a chip and an electronic device. The apparatus comprises: a voltage adjustment module (10) comprising a first P-type metal-oxide-semiconductor field-effect transistor (PMOS), wherein the voltage adjustment module (10)...  
WO/2021/117272A1
This resonance device (1) comprises: a lower lid (20); an upper lid joined to the lower lid (20); and a resonator (10) that has vibration arms (121A-121D) capable of bending and vibrating inside an inner space provided between the lower ...  
WO/2021/114556A1
The present invention relates to a bulk acoustic wave resonator and a manufacturing method therefor. The resonator comprises: a substrate; a bottom electrode; a top electrode; and a piezoelectric layer provided between the bottom electro...  
WO/2021/115579A1
Frequency multipliers (300) for generating a differential output signal from a single-ended input signal are disclosed. The frequency multiplier comprises a single-ended input (Pin(f0)) to receive the input signal with a frequency of f0 ...  
WO/2021/115327A1
The present application provides a signal transmitter, which is able to improve the flexibility of signal decomposition of a transmitter and improve the system performance of the signal transmitter. The signal transmitter comprises: a si...  
WO/2021/117386A1
[Problem] To achieve IMRR improvement with a simple configuration. [Solution] This receiving device is provided with a mixer which includes: a first mixer which converts the phase difference between a first signal and a second signal int...  
WO/2021/118945A1
Noise compensation method comprising: (a) receiving a content stream including content audio data; (b) receiving first microphone signals from a first device; (c) detecting ambient noise from a noise source location in or near the audio ...  
WO/2021/117581A1
The present invention prevents occurrence of polarization reversal. In this elastic wave device (1), a plurality of first electrode fingers (61) and a plurality of second electrode fingers (62) are disposed on a piezoelectric layer (5). ...  
WO/2021/114140A1
Disclosed are a packaging method for a filter chip (300), and a packaging structure. The packaging method comprises: providing a circuit substrate (100); covering a first surface of the circuit substrate (100) and/or the filter chip (300...  
WO/2021/116434A1
An oscillator arrangement is provided, comprising a relaxation oscillator (2) having an active state and an inactive state; a bias current circuit portion (16) arranged to provide a bias current (14) to the relaxation oscillator (2) duri...  
WO/2021/117142A1
An amplification element (T1) amplifies an input signal. A harmonic wave matching circuit (3) is connected to an output terminal of the amplification element (T1) via a first wire (W1). The harmonic wave matching circuit (3) comprises a ...  
WO/2021/116795A1
An electronic circuit configured to present a high-impedance load between a load point (VL) and a reference point includes a capacitive element (C) provided between a first node (Node A) and the reference point, a first element (D1) conn...  
WO/2021/119037A1
Systems and methods for providing external bus protection for programmable logic devices (PLDs) are disclosed. An example system includes a programmable I/O bus configured to interface with a user device over an external bus interface co...  
WO/2021/115500A1
The device for accurate measurement of time intervals comprises a first comparator (1) to the input of which a first signal (STA) is fed and the output of which is connected to the first of the inputs of the combiner (3), to the second i...  
WO/2021/117416A1
Provided is a level shifter circuit that changes and outputs the voltage of a high-frequency input signal. Provided is a level shifter circuit comprising: a first input terminal and a second input terminal into which an input signal ha...  
WO/2021/115670A1
The present application concerns an iterative bit-flipping decoding method using symbol or bit reliabilities, which is a variation of GRAND decoding and is denoted by ordered reliability bits GRAND (ORBGRAND). It comprises receiving a pl...  
WO/2021/114939A1
A time-interleaved successive approximation analog to digital converter (TISAR ADC) and a calibration method thereof. The TISAR ADC calibration method comprises: performing sampling of an analog signal input into the TISAR ADC, so as to ...  
WO/2021/114970A1
A film bulk acoustic resonator structure manufacturing method is provided, comprising: determining a connection mode for film bulk acoustic resonators to be formed; etching a substrate (100) to form recesses (101), and filling the recess...  
WO/2021/115618A1
The invention relates to first and second communication devices for pilot-less transmissions in a communication system. The first communication device obtains bits for transmission (B c ) and uses a linear mapping function (f) to a vecto...  
WO/2021/118637A1
A circuit for transferring a n-bit phase value between circuits includes a system clock input, a n-bit phase value generator coupled to the system clock input generating a phase value output, and an edge output indicating the phase outpu...  
WO/2021/115701A1
The invention relates to a phase locked loop for a driver circuit for operating a MEMS gyroscope with a seismic mass which can be excited to oscillate, comprising an input interface for receiving position signals representing the current...  
WO/2021/115535A1
The invention relates to a method (100) for controlling a variable matching network (4) for impedance matching, to a matching network (4) for carrying out said method (100) according to the invention and to a system (1) comprising a sign...  
WO/2021/118395A1
The present disclosure provides an encoding and decoding device implementing an improved forward error correction, FEC, coding/ decoding method. In particular, the encoding device is configured to encode a stream of data symbols using a ...  
WO/2021/119469A1
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may operate in a dual-connectivity (DC) configuration, and may measure signals from more than one radio access technology (RAT). The UE may re...  
WO/2021/115884A1
An exemplary embodiment of the invention relates to an electrical amplifier (10) comprising a differential preamplifier (PA) having a first output port and a second output port; and a downstream amplifier stage (DAS) having a first outpu...  
WO/2021/116796A1
An amplifier circuit includes a resistor divider (RREF) comprising n resistive elements, two main nodes defined at each end thereof, two readout nodes (ch, cfe), resistor nodes (q) defined between adjacent resistive elements, and an inpu...  
WO/2021/117661A1
A gate drive circuit (100) that drives a power device by controlling charging and discharging of the gate capacity of the power device, the gate drive circuit (100) comprising: a first semiconductor switch (11) that charges the gate capa...  
WO/2021/117627A1
This semiconductor device includes: a semiconductor chip which has a main surface; a device region which is partitioned off on the main surface; a differential amplifier which is formed in the device region and which amplifies and then o...  
WO/2021/113887A1
The invention relates to a method for generating random numbers, wherein a) a source (1) emits energy, in particular in the form of pulses, with a specified distribution at non-predictable points in time, b) a detector (3) which is conne...  
WO/2021/115572A1
A circuit (100) for impedance transforming comprises a first port (P1), a second port (P2) and a tapped transformer (110) comprising a first winding (111) and a second winding (112). Each winding comprises a first terminal, a second term...  
WO/2021/113968A1
Systems and methods are provided for timing signals, measuring latency, and/or timestamping. Some of the systems described herein can measure latency in a network device, and can include a signal generator, a sampler, a pulse detector, a...  
WO/2021/117393A1
The present disclosure provides a circuit device (10A) comprising a substrate (2) having a wire pattern formed thereon, and a coil component (1) mounted on the substrate (2). The wire pattern includes a land electrode (70) connected to a...  
WO/2021/116263A1
A method serves for operating a drive unit comprising an active element (1) having a resonator (2) and an excitation means (23) for exciting oscillations in the resonator (2) and thereby driving a passive element (4). The method comprise...  
WO/2021/115453A1
Provided in the present application are a wireless receiver and a wireless device. The wireless receiver comprises: a radio frequency pre-stage circuit and a radio frequency post-stage circuit. The radio frequency post-stage circuit comp...  
WO/2021/115536A1
The invention relates to a variable capacitor system (1) for impedance matching, a matching network (4) comprising said type of variable capacitor system (1), a system (10) comprising said type of matching network (4) and to a use of the...  
WO/2021/117181A1
A driver circuit comprising: differential pair transistors (Q1, Q2) that amplify differential input signals and output same from signal output terminals (3, 4); a current source (Q3) that supplies a constant current to the differential p...  
WO/2021/117083A1
In the present invention, a distributed amplifier comprises: transmission lines (CPW1, CPW2) configured to transmit signals; a variable capacitor (Ctune1) configured so that one end thereof is connected to the transmission line (CPW1), t...  
WO/2021/116639A1
An apparatus (401) for providing a switch mechanism comprises a housing (402) and a pressure sensitive device (403) mounted to the housing. An actuator (405) is moveably connected to the housing to enable the actuator to move along an ax...  
WO/2021/119673A1
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a radio frequency (RF) receiver including a dual-mode low noise amplifier (LNA). One of the methods includes configuring the RF receiver ...  
WO/2021/119190A1
Some implementations involve receiving a content stream that includes audio data, receiving at least one type of level adjustment indication relating to playback of the audio data and controlling a level of the input audio data, based on...  
WO/2021/119570A1
Optimally detuned parametric amplification amplifies a signal in a resonator that is driven off-resonance, with respect to a signal mode, using a far-detuned pump. This pump establishes a parametric drive strength, and is "far-detuned" i...  
WO/2021/064013A3
Data stream (45) having a representation of a neural network (10) encoded thereinto, the data stream (45) comprising serialization parameter (102) indicating a coding order (104) at which neural network parameters (32), which define neur...  
WO/2021/114333A1
Disclosed is a circuit for reducing spurs in a local oscillator loop in a wireless communication comprehensive tester. The present invention provides a circuit for reducing spurs in a local oscillator loop in a wireless communication com...  
WO/2021/117392A1
The present invention provides a multilayer substrate (200) comprising a laminate, internal wiring (203), land electrodes (201, 202), and a ground electrode (204). The internal wiring (203) is disposed extending towards the land electrod...  
WO/2021/119578A1
A power-on-reset (POR) circuit (800) includes an NFET branch (302) and a PFET branch (306). The NFET branch (302) includes: an n-channel field effect transistor (NFET) (310, 312) having a first threshold voltage (Vthn); and a first quies...  
WO/2021/117140A1
A filter circuit (1) according to the present invention is provided with: a division unit (2) that generates input blocks by dividing an input signal and adding, to the end of each division block, reproduced data generated by reproducing...  
WO/2021/117821A1
According to the present invention, a switching circuit 100 includes a high-side transistor MH and a low-side transistor ML of N channels. A switch SW1 and a rectifying element D1 of a PMOS transistor are provided in series between a con...  
WO/2021/118946A1
Some noise compensation methods involve receiving microphone signals corresponding to ambient noise from a noise source location in or near an audio environment, determining or estimating a listener position in the audio environment and ...  
WO/2021/116911A1
An LC oscillator is provided. The LC oscillator includes a single layer inductor disposed within a single layer inlay, wherein the single layer inductor is configured in a spiral pattern within the layer of the inlay, wherein an integrat...  

Matches 1 - 50 out of 570,639