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JP2000059207A |
To improve counting reliability of an up/down counting circuit which executes counting up and counting down by switching. When the counting value of a low-order counter 21 becomes the maximum value by counting up, the counter 21 sends an...
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JP3009533B2 |
PURPOSE:To speed up the count repeative period for a large-capacity counter using a memory. CONSTITUTION:A memory part 10 is provided to store plural count values together with an addition part 20 which adds the addition value N to the c...
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JP2000040955A |
To reduce the number of comparison processing times, to raise the frequency of a pulse that is an object to be counted and to increase the number of target values to be counted by comparing lower order parts with each other, when the hig...
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JP2000029561A |
To prevent the data guarantee time from being shortened when the output of an LSI having longer data output delay time reaches LSI on the another side in the mutually connected LSIs to which a clock of the same cycle is supplied. Concern...
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JP2602404Y2 |
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JP2997139B2 |
A first odd-number frequency divider for frequency-dividing and outputting an input signal of optional frequency includes a counter having cascade-connected n [n=1, 2, 3] elements of flip-flop circuits for receiving an input signal and o...
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JP2998650B2 |
To conduct DC selection with high reliability by a simple circuit independently of component dispersion of a frequency divider to be tested and not employing a reference frequency divider. The output of an oscillator 1 is given to a cloc...
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JP2998501B2 |
PURPOSE: To provide the clock signal and synchronous reset signal generating circuit which eliminates the probability of the block in an LSI to which a clock signal and a reset signal are given takes a malfunction at the time of reset re...
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JP2997274B2 |
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JP2998704B2 |
To shorten as test time and to make a test circuit simple by providing a higher-order bit counter, which uses the output of a selecting means as a count signal and a low-order bit counter which has more bits than the higher- order bit co...
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JP2995804B2 |
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JP2995914B2 |
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JP2994272B2 |
To reduce the dispersion in the duty of an internal clock of the clock generating circuit and to set the duty. The leading edge of internal clocks C1, C2 is synchronized with the trailing edge of an output signal CA of a PLL circuit 1, a...
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JPH11340816A |
To easily attain function setting, and to simplify a user operation by inputting a program via a port for communication and an interface, and wiring data included in the program in an RAM at the wiring of the program in a flash memory. A...
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JP2986881B2 |
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JPH11330951A |
To obtain the counter circuit which generates no noise when operating. Three stages of D flip-flops FF1 to FF3 are connected in series. A delay element 11 outputs a delayed signal S2D by delaying the signal S3 from the Q output of the D ...
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JP2984591B2 |
To shorten timer count processing, which is to be performed at time-up, and to attain the application of software timer to the system of severe control timing in the case of counting the software timer to use the built-in timer of microc...
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JP2984614B2 |
To reduce the consumption of a power battery and to extend the communication time by measuring the temperature for execution of the reception processing and correcting the count value for setting an intermittent receiving cycle based on ...
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JP2985483B2 |
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JP2979965B2 |
PURPOSE: To obtain an electronic counted-value storage apparatus in which the number of pulses which are less than the number of unit pulses can be held by a storage means by a method wherein a processing means which finds a counted numb...
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JPH11312972A |
To provide a frequency divider circuit and a counter circuit that can attain reduction of a test time without lowering an original circuit function in the frequency divider circuit and the counter circuit composed of flip-flop circuits c...
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JPH11298317A |
To provide double accuracy without doubling the frequency of an input pulse number or doubling gate time in a counting device. Two each of oscillation output are counted every time of the rise or fall of pulses by a counter 12. The corre...
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JPH11298316A |
To provide a counter device capable of reducing a mounting space and raising a density. This counter device is provided with a generated event selection part 1 for specifying the corresponding address of a memory 2 for respective generat...
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JP2966435B2 |
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JP2964487B2 |
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JPH11284504A |
To attain a counter circuit with small increase in the circuit scale in the case of the increase in the number of parallel data and a count number with respect to a counter circuit which counts the total number of numbers 1 or 0 in paral...
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JPH11274917A |
To generate a clock having a desired frequency from an arbitrary clock, without increasing the cost and the man-hours. A frequency divider circuit 1 generates a frequency division signal S2 and a frequency division signal S3, based on a ...
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JP2953713B2 |
PURPOSE:To easily confirm the function of a counter within a short time by incorporating a multivibrator in the test circuit of the counter of a semiconductor integrated circuit. CONSTITUTION:A selector 2 is changed over to a usual input...
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JPH11251924A |
To frequency-divide the frequency of a reference clock to one in an integer except for n-th power of '2' by outputting one of output signals of a logic gate circuit as a signal obtained by frequency-dividing the reference clock signal in...
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JPH11234353A |
To provide a frequency counting circuit capable of more accurately measuring the frequency of modulated IF signals. By counting the radio of 1/0 of data demodulated by a demodulation circuit (a) coincidentally with the counting of an IF ...
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JPH11225065A |
To provide the preset counter that realizes a function of a 2-stage setting preset counter by using a 1-stage transistor output circuit and a relay output circuit. This preset counter is provided with a RAM 13 that stores a count and a p...
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JPH11225064A |
To provide a frequency division circuit having a frequency division ratio of an optional fraction. A counter section 10 is operated, based on a control signal CS1 when a count CNT3 of a counter section 40 is 0-2, and applies 1/5 frequenc...
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JPH11220383A |
To provide a counter device which can read or write a timer counter stably with a timer clock asynchronous with a system clock, a clock controller which stably supplies the timer clock, and a interval timer device which is equipped with ...
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JPH11214985A |
To provide a counter circuit that includes a test circuit, capable of quickly deciding whether or not a counter operation is normal. When a counter operation starts, '1' is set with a counter operation signal at the time of normal operat...
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JPH11214984A |
To provide a counter circuit that surely performs a self reset when a count proceeds, reaches a specified value or an overflow occurs and is capable of preventing a mis-operation, when a count operation is restarted. This circuit is equi...
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JPH11205126A |
To provide a prescaler circuit capable of stably performing frequency division without being affected by a frequency division ratio N and the delay of a circuit at the time of the frequency division, preventing the generation of spurious...
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JP2917726B2 |
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JPH11186901A |
To provide a clock signal generating circuit that generates a clock signal with a frequency division ratio expressed in an optional fraction from an original oscillation frequency. A master clock signal IN is counted by a count section 2...
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JPH11186899A |
To provide the clock signal generating circuit that easily generates clock signals with a plurality of frequencies without increasing the cost and making the circuit remarkably complicated and large-sized based on a signal oscillated by ...
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JP2908464B2 |
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JP2906966B2 |
A pulse counter circuit has an invertor which inverts a pulse signal input thereto to form an inverted signal. One of the pulse signal and the inverted signal is selected in response to a selecting signal, and the selected signal is deli...
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JPH11125662A |
To prevent a clock skew of a plurality of scan flip-flop groups. A fresh clock terminal 11 is set at one input terminal of a data selector 7, so that a B group is provided with a fresh path through which system clocks are input from the ...
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JPH11504792A |
According to the present invention there is provided an encoder, which in one embodiment, includes a processing circuit which generates an output code according to an encoding algorithm, a counter circuit for incrementing a counter value...
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JPH11110499A |
To reduce the number of times of rewriting of a non-volatile memory. The frequency counter 1 is provided with a binary counter part 11 having a binary counter 20 for counting-up frequency data and an EEPROM counter part 12 having an EEPR...
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JPH1198006A |
To provide a counter which can receive and store the external initialization data without using any communication port. This counter includes an input/output part 12 and a one-chip microcomputer 11. The part 12 inputs the count input, re...
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JPH1198008A |
To keep logical amplitude constant and to perform a frequency dividing operation in entire high and low current areas by suppressing the reduction of logical amplitude caused accompanying the drop of control current with limit amplifiers...
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JPH1188151A |
To prevent run out synchronizing by supplying reset signals from the counters of preceding stages, which are outputted from gate circuits, to the clear terminals of the counters of the succeeding stages when the reset signals from the pr...
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JP2871787B2 |
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JP2872098B2 |
To eliminate a load cycle for writing from an external test pattern generation circuit and shorten the testing time by generating and writing test data during test mode operation between a storage element and an operational circuit insid...
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JPH1174782A |
To provide a counter circuit capable of preventing count data from being erased by holding the count data until it is read from a register after the count data is stored in the register from the counter circuit. This counter circuit is p...
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