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Matches 1 - 50 out of 27,091

Document Document Title
WO/2021/086872A1
Devices, methods and techniques are disclosed for providing a multi-layer diode without voids between layers. In one example aspect, a multi-stack diode includes at least two Drift Step Recovery Diodes (DSRDs). Each DSRD comprises a firs...  
WO/2021/080671A1
An asynchronous multi-cycle reset synchronization circuit that can correlate any number of resets and synchronous clocks with simultaneous reset de-assertion and removal of reset assertion crossing hazards. The asynchronous multi-cycle r...  
WO/2021/075150A1
The present invention provides a filter circuit capable of preventing, by a simple configuration, the circuit from malfunctioning even when power-supply voltage has changed, and a semiconductor device. This filter circuit is provided wit...  
WO/2021/071426A1
A circuit for mitigating single-effect-transients (SETs) comprising: a first sub-circuit comprising a first p-type transistor arrangement configured to generate a first output and a first n-type transistor arrangement configured to gener...  
WO/2021/067255A1
Described herein are apparatuses and methods for applying high voltage, high current, sub-microsecond (e.g., nanosecond range) pulsed output to a biological material, e.g., tissues, cells, etc., while preventing damage from load arcing. ...  
WO/2021/059013A1
Methods and systems for classical processing in a quantum controller are operable to receive data from a quantum processor and demodulate a feedback pulse according to a command, a vector of digital samples and a vector of quadrature ref...  
WO/2021/059579A1
The present invention comprises: a first wiring (11); a second wiring (12) that is not connected to the first wiring (11) and is provided for redundancy, to transmit the same signal level as the first wiring (11); and other wiring (21, 2...  
WO/2021/059582A1
This semiconductor device comprises: a first latch circuit (L1) including a first inverting circuit (i1), a second inverting circuit (i2), a third inverting circuit (i3), and a fourth inverting circuit (i4); first-type well regions (Wp1,...  
WO/2021/059580A1
A semiconductor device according to one embodiment of the present disclosure is provided with a plurality of wiring layers (M1 to M3), a first wiring line (11), and a second wiring line (12) which is not connected to the first wiring lin...  
WO/2021/061170A1
An SEU immune flip-flop includes a master stage data latch, being transparent in response to a clock signal first state and being latched in response to a clock signal second state; a slave stage data latch; and a scan slave latch having...  
WO/2021/062223A1
Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electricall...  
WO/2021/059003A1
Method for generating gigahertz bursts of laser pulses is provided, where: 1) time delay T2 of the delayed part with respect to the undelayed part of the input pulse is longer than a time period T1 between said input pulse and the next i...  
WO/2021/055155A1
A digital to analog converter (DAC) includes a plurality of DAC transistor devices having an input side configured to be selectively coupled to a system voltage based on a digital input signal and an output side configured to provide an ...  
WO/2021/044212A1
A system comprises pulse generation and measurement circuitry comprising a plurality of pulse generator circuits and a plurality of ports, and management circuitry. The management circuitry is operable to analyze a specification of a con...  
WO/2021/036071A1
Disclosed in embodiments of the present invention are a pulse signal generation device and method. The device comprises a clock module, an FPGA module and a control module. The clock module is used to provide a reference clock signal to ...  
WO/2021/040947A1
A clock gate circuit (CGC) is described that optimizes dynamic power of the CGC when clock is gated. The CGC helps in dynamic power reduction of clock network by offering lower clock pin capacitance and also by providing clock pin driver...  
WO/2021/040594A1
Disclosed is a Radio Frequency communication device, RF communication device, (10) wherein said RF communication device (10) comprises a signal transmitting circuitry comprising tunnel diode oscillator circuitry, TDO circuitry, (13) and ...  
WO/2021/035002A1
A comparator circuit includes a first transistor (206), a second transistor (208), a first switch (210), a second switch (212), and a timing circuit. The first transistor (206) and the second transistor (208) are coupled as a differentia...  
WO/2021/029905A1
An improved level shifter for use in integrated circuits is disclosed. The level shifter is able to achieve a switching time below 1 ns while still using the core power supply voltages, VDDL and VDDH, used in the prior art. The improved ...  
WO/2021/023129A1
A real-time pulse monitoring circuit (520) and a tumor treatment apparatus, the real-time pulse monitoring circuit (520) comprising a capacitor group (111), a pulse generator (320) connected to the positive pole of the capacitor group (1...  
WO/2021/026499A1
An apparatus may include an energy rate limiter, an electro-optical transmitter, and an energy monitor. The energy rate limiter limits energy transfer, based on an energy control signal, from a power supply to the energy storage module. ...  
WO/2021/023544A1
The invention relates to an optical pulse generator and to a method for operating an optical pulse generator. In particular, an optical pulse generator according to the invention is to uniformly supply all emitters and their segments of ...  
WO/2021/025821A1
A latch and/or flip-flop with reduced dynamic capacitance for the clock node. Power associated with the clock node is reduced without timing impact. Merely two clock devices and merely the signal on the clock input pin toggles when the d...  
WO/2021/023506A1
The present invention relates an implantable pulse generator comprising an electric circuit, wherein the electric circuit comprises: a primary energy store, at least one secondary energy store, and a control unit, wherein the control uni...  
WO/2021/024083A1
The present invention provides a semiconductor device with a novel structure. The present invention has a CPU and an accelerator. The accelerator has a first memory circuit and a computation circuit. The first memory circuit has a first ...  
WO/2021/021398A1
One example includes a superconducting clock conditioning system. The system includes a plurality of inductive stages. Each of the plurality of inductive stages includes an inductive signal path that includes at least one inductor and a ...  
WO/2021/019542A1
A switching circuit comprises a main switch element having a gate as a control input; and a ring oscillator connected as a driver circuit to the gate to drive the main switch via the gate. The basic circuit is used to build various compo...  
WO/2021/014891A1
Provided are a resonator, an oscillator, and a quantum computer capable of suppressing the occupied area of a circuit while achieving both moderate non-linearity and low loss. A resonator (100) comprises: at least one loop circuit (110) ...  
WO/2021/016455A1
An electronic circuit (200) which is a high speed CMOS logic circuit to divide the frequency of an input signal is provided. The electronic circuit comprises a ring oscillator (201). The ring oscillator (201) comprises a plurality of gat...  
WO/2021/005439A1
Provided are novel oscillator, amplifier circuit, inverter circuit, amplifier circuit, battery control circuit, battery protection circuit, electrical storage device, semiconductor device, electrical equipment, and the like. This semicon...  
WO/2021/000064A1
Disclosed in embodiments of the present application is an RC oscillator. The RC oscillator may use a first amplifier and a second amplifier to amplify the difference between a first voltage and a second voltage. The first amplifier may c...  
WO/2021/003319A1
Some embodiments include a plasma system that includes a plasma chamber; an RF driver driving RF bursts into the plasma chamber with an RF frequency greater than 2 MFiz; a nanosecond pulser driving pulses into the plasma chamber with a p...  
WO/2021/001040A1
An oscillator circuit (15) is disclosed. It comprises N amplifier circuits (A1-A4), connected in a ring and has a first and a second supply terminal (s1, s2). Each amplifier circuit (A1-A4) comprises an input transistor (M1) having its g...  
WO/2020/262771A1
The present invention is formed so that a plurality of delay cells provide square-wave voltages to a plurality of transistors in accordance with specific time periods, the plurality of transistors transfer current to an oscillator in acc...  
WO/2020/258640A1
An avalanche triode-based nanosecond pulse power supply for micro electric discharge machining, comprising: a direct current power supply (V1), a charging circuit, a discharging circuit, a driving pulse input circuit, and a steepening wa...  
WO/2020/249922A1
Various implementations described herein are directed to a device having a voltage regulator that uses a modulator to adjust an output voltage. The device may include a time-to-digital converter that measures a timing delay of a logic ch...  
WO/2020/252452A1
Methods, systems, and computer readable media described herein can be operable to facilitate transitioning a device from a first state to a second state. A switch described herein allows for the use of an electronic circuit to perform th...  
WO/2020/249929A1
There is provided an apparatus for pulse charging of a load capacitor, the apparatus comprising: a ferrous cored transformer having a primary winding and a secondary winding; a primary circuit connected to the primary winding; a secondar...  
WO/2020/246092A1
Provided is a phase synchronization circuit constituted by a digital circuit, wherein a circuit for generating phase difference information is reduced in terms of circuit scale. A multiphase clock generation circuit generates a plurali...  
WO/2020/245260A1
An arrangement (100) is disclosed, comprising at least one electrical energy storage module (30; 35) configured such that it can be charged or discharged, the at least one electrical energy storage module (30; 35) being connectable or co...  
WO/2020/247005A1
Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a passgate, a passgate inverter, a leakage compensation unit, and an inverter. The passgate may be coupled between a flip-flop data input termin...  
WO/2020/241000A1
Provided is an electronic circuit equipped with: a cell array comprising a plurality of memory cells, each of the memory cells being equipped with a bistable circuit equipped with a first inverter circuit and a second inverter circuit th...  
WO/2020/237648A1
The present application relates to the field of display, and provides a signal frequency adjustment method and apparatus, a display apparatus, and a storage medium. The method comprises: obtaining a first number of times that a reference...  
WO/2020/242332A1
The invention relates to the electromagnetic stimulator, which consists of the connector (Jl), the charger (1), the battery (2), the power supply (3), the oscillator (4), the central processing unit (CPU) (U3), the driver (6) and the LED...  
WO/2020/240341A1
Provided is a semiconductor device that shows less temperature dependency. According to the present invention, a switched capacitor is constructed with a second transistor, a third transistor, and a second capacitance. The second and thi...  
WO/2020/233250A1
Provided in the present application are a servo motor drive circuit and a 3D printing device. A motion controller is connected to a timer, and is used for sending a drive enable signal to the timer; a pulse period providing unit is conne...  
WO/2020/236712A1
At least some aspects of the present disclosure provide for a system (104). In some examples, the system includes a pulse width modulation (PWM) generator (218) configured to generate a PWM signal (PWM1). The PWM generator generates the ...  
WO/2020/236209A1
A pulse signal compensation circuit of a pulse generator can include a pulse measurement circuit and a compensation generator circuit. The pulse measurement circuit can be configured to receive a plurality of pulse signals and to generat...  
WO/2020/225641A1
Provided is a semiconductor device which is less prone to characteristics variations due to operating temperature. The semiconductor device has an odd number of stages of inverter circuits connected in a ring, wherein the inverter circui...  
WO/2020/222044A1
A quantum controller comprises a quantum control pulse generation circuit and digital signal management circuit. The quantum control pulse generation circuit is operable to generate a quantum control pulse which can be processed by any o...  

Matches 1 - 50 out of 27,091