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WO/2021/106544A1 |
This comparator circuit comprises: a 0-th capacitor having a first end to which an input voltage is applied; a 0-th inverter having an input end connected to a second end of the 0-th capacitor at a 0-th node; a first capacitor having a f...
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WO/2021/101973A1 |
Various aspects provide for a digitally programmable analog duty-cycle correction circuit. For example, a system includes a duty-cycle correction circuit and a duty-cycle distortion detector circuit. The duty-cycle correction circuit adj...
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WO/2021/101208A1 |
A memory device according to the present invention may comprise: a memory cell array in which memory cells are connected in matrix form to word lines and bit lines; a plurality of mergers connected in series to transfer data that is read...
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WO/2021/092704A1 |
A method for timing aperture synthesis arrays comprising the steps of: (a) coupling a plurality of independent crystal oscillators, each of the plurality of independent crystal oscillators having a unique output frequency; (b) digitally ...
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WO/2021/093579A1 |
A waveform measuring method, comprising: first convert a waveform to be measured into two corresponding square waves by means of two comparators; collect the two square waves after a hardware logic device receives a signal of starting to...
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WO/2021/096599A1 |
One embodiment includes a clock distribution system. The system includes at least one resonator spine that propagates a sinusoidal clock signal and at least one resonator rib conductively coupled to the at least one resonator spine and a...
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WO/2021/091833A1 |
A signal detection circuit (400) includes a signal input terminal (402), a rectifier circuit (404), a comparator circuit (406); a current source (408), and a comparator output terminal (412). The rectifier circuit (404) is coupled to the...
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WO/2021/082368A1 |
A Schumann wave generating apparatus and a wave modulation method for a Schumann wave generating apparatus, and an air conditioner. The Schumann wave generating apparatus comprises a receiving module (10), a modulation module (30), and a...
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WO/2021/078675A1 |
The invention relates to a method for a simple measurement of the phase offset ΔT between a first clock signal CLK1 and a second clock signal CLK2, each clock signal having a respective period T 0. The method involves the following step...
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WO/2021/080903A1 |
A quadrature clock skew calibration circuit (100) includes an I-Q clock generator (104) having an input coupled to receive a first clock signal. The I-Q clock generator generates an in phase (7) clock signal and a quadrature (Q) clock si...
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WO/2021/074603A1 |
A digital signal generation assumes that a base frequency (the frequency with which the primitive phase angles are specified relative to) is equal to the carrier frequency for all relevant times. But this causes errors in the digital sig...
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WO/2021/068551A1 |
Disclosed are a data storage and comparison method, a storage and comparison circuit apparatus, and a semiconductor memory. The storage and comparison circuit apparatus comprises a latch and a comparator, wherein the latch is used for la...
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WO/2021/072251A1 |
An input driven self-clocked dynamic comparator, and associated systems and methods are described herein. In one embodiment, self-clocked dynamic comparator, includes a latch configured to receive an input voltage (VIN), a reference volt...
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WO/2021/072147A1 |
A radio-frequency (RF) pulse generation system for generating an ultrashort high-power RF pulse includes an RF signal source that generates an input RF signal and/or amplifies the input RF signal to generate an amplified signal of a powe...
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WO/2021/068011A1 |
The description below relates to a method and a circuit for synchronizing asynchronous digital signals. According to an exemplary embodiment, the circuit has a first series circuit comprising a first input flip-flop and a first output fl...
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WO/2021/062223A1 |
Some embodiments include a nonlinear transmission line system comprising: a power supply providing voltages greater than 100 V; a high frequency switch electrically coupled with the power supply; a nonlinear transmission line electricall...
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WO/2021/038349A1 |
The present invention provides a novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electrical apparatus, and the l...
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WO/2021/039709A1 |
This communication device is used in a communication system in which, in synchronization with communication of any one communication device among a plurality of communication devices that transmit/receive data through a transmission path...
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WO/2021/035002A1 |
A comparator circuit includes a first transistor (206), a second transistor (208), a first switch (210), a second switch (212), and a timing circuit. The first transistor (206) and the second transistor (208) are coupled as a differentia...
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WO/2021/021398A1 |
One example includes a superconducting clock conditioning system. The system includes a plurality of inductive stages. Each of the plurality of inductive stages includes an inductive signal path that includes at least one inductor and a ...
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WO/2021/013616A1 |
The present application relates generally to silicon photomultiplier (SiPM) detector arrays. In one aspect, there is a system including an array of cells each including a single-photon avalanche diode (SPAD) reverse-biased above a breakd...
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WO/2020/261039A1 |
Provided is a semiconductor device withi minimized increase in circuit area and less power consumption. The semiconductor device has a high-frequency amplification circuit, an envelope detection circuit, and power supply circuit. The pow...
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WO/2020/262771A1 |
The present invention is formed so that a plurality of delay cells provide square-wave voltages to a plurality of transistors in accordance with specific time periods, the plurality of transistors transfer current to an oscillator in acc...
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WO/2020/257855A1 |
An evacuation device comprising a microphone to record an audible signal, for conversion to a visual signal, in the form of a flashing light to aide evacuation from a smoke filled environment. In the preferred embodiment, the unit senses...
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WO/2020/263378A1 |
Switched adaptive clocking is provided. A switched adaptive clocking circuit includes a digitally controlled oscillator, a clock generator and a glitch-free multiplexer. The switched adaptive clocking circuit to adaptively switch a sourc...
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WO/2020/255854A1 |
A signal detection circuit for detecting a signal subject to detection, which is a signal from a main terminal of a switching element (2), by means of a comparison with a reference signal, the signal detection circuit being provided with...
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WO/2020/255853A1 |
This signal detection circuit is provided with: a first capacitor (C1), one terminal of which is connected to one main terminal of a switching element (2); a second capacitor (C2), one terminal of which is connected to the other main ter...
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WO/2020/255371A1 |
A variable delay circuit according to the invention comprises: a first delay circuit including a plurality of first delay elements that can be switched between returning a received signal to the input side and forwarding the received sig...
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WO/2020/255722A1 |
The present invention suppresses influence against the miniaturization and high density integration of a chip and adds an inductor. An avalanche photo diode sensor pertaining to an embodiment is provided with: a first chip including an a...
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WO/2020/248318A1 |
A bidirectional adaptive clock circuit supporting a wide frequency range, belonging to the technical field of basic electronic circuits. Said circuit consists of a phase clock generation module, a phase clock selection module, an adaptiv...
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WO/2020/246092A1 |
Provided is a phase synchronization circuit constituted by a digital circuit, wherein a circuit for generating phase difference information is reduced in terms of circuit scale. A multiphase clock generation circuit generates a plurali...
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WO/2020/247005A1 |
Aspects for a flip-flop circuit are described herein. As an example, the aspects may include a passgate, a passgate inverter, a leakage compensation unit, and an inverter. The passgate may be coupled between a flip-flop data input termin...
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WO/2020/237648A1 |
The present application relates to the field of display, and provides a signal frequency adjustment method and apparatus, a display apparatus, and a storage medium. The method comprises: obtaining a first number of times that a reference...
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WO/2020/235090A1 |
There are indicated, on the basis of a peek point of an integrated waveform of a received signal (b) per one-bit time, a timing to reset an integrated value of the received signal (b) per one-bit time and a timing to determine whether th...
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WO/2020/236209A1 |
A pulse signal compensation circuit of a pulse generator can include a pulse measurement circuit and a compensation generator circuit. The pulse measurement circuit can be configured to receive a plurality of pulse signals and to generat...
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WO/2020/229265A1 |
The invention relates to a method (700) for determining a time of a flank (200) in a signal (132), wherein the method (700) comprises a step of reading (710) the signal (132) and has a master clock (210) for operating a digital evaluatio...
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WO/2020/224289A1 |
Provided are an enhanced substrate-based comparator and an electronic device, said comparator comprising: a cross-coupled latch (1), used for connecting an input signal to a gate of a cross-coupled MOS transistor to form a first input te...
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WO/2020/225721A1 |
A clock recovery circuit (104) includes a first pulse circuit (106), a second pulse circuit (108), a state change circuit (110) connected to the first pulse circuit and the second pulse circuit and a first delay circuit (112) connected t...
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WO/2020/218472A1 |
Provided are a hysteresis comparator with which it is possible to obtain desired characteristics even when an IC chip comprising a comparator with no hysteresis or a comparator with a small hysteresis width is used, and a communication c...
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WO/2020/214377A1 |
Apparatus and associated methods relating to a switch leakage compensation delay circuit (405a) include a compensating transistor (To) configured to passively bypass a leakage current around a capacitor (Co) that connects in series with ...
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WO/2020/210272A1 |
In described examples, an amplifier (100) can be arranged to generate a first stage (110) output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source II thr...
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WO/2020/210359A1 |
Methods and systems are described for generating, at a plurality of delay stages of a local oscillator, a plurality of phases of a local oscillator signal, generating a loop error signal based on a comparison of one or more phases of the...
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WO/2020/210145A1 |
A circuit includes a peak detector (220), a diode (DO), a dynamic clamp circuit (210), and an offset correction circuit (250). The peak detector (220) generates a voltage on the peak detector output proportional to a lowest voltage on th...
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WO/2020/208927A1 |
The purpose of the present invention is to reduce errors that are caused by changes in delay time when driving a light-emitting element. A light emission driving device (10) comprises: a light emission current detection unit (401)(12); a...
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WO/2020/193579A1 |
The invention relates to a setting device (1) for setting an effective value of an electric load current at a time-variant load (2). There is provision for the setting device (1) to be configured to provide a voltage pulse sequence (4), ...
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WO/2020/190958A1 |
A control module may modify a duty cycle and phase timing for each phase of a multiphase cycle, based the center of a synchronization signal, to cause an equivalent transition time between each phase of the multiphase cycle.
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WO/2020/191290A1 |
A differential-slope-limiting-switch and method are provided. Generally, the switch includes a first transistor having a first source-drain (SD) and well coupled to a first port of the switch, a gate, and a second SD, and a second transi...
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WO/2020/190825A1 |
A multi-stream cross correlator for spiking neural networks, where each stream contains significant stochastic content. At least one event occurs, with a fixed temporal relationship across at least two streams. Each stream is treated as ...
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WO/2020/186471A1 |
A delay circuit and a drive device, wherein the delay circuit may comprise at least two branches, the at least two branches are connected in parallel, and each of the at least two branches has a different delay; and the delay circuit com...
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WO/2020/185341A1 |
One embodiment includes a clock distribution resonator system (10). The system includes a clock source (12) configured to generate a clock signal (CLK) having a predefined wavelength, and a main transmission line (16) coupled to the cloc...
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