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WO/2008/079717A1 |
Exemplary sigma-delta modulators (100) include a summing block (101) configured to receive an input signal, a noise shaping unit (102) configured to process an output signal of the summing block (101), a quantizer (103) configured to qua...
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WO/2008/076519A2 |
A multi-mode analog-to-digital converter (100) includes a delta-sigma analog-to- digital converter circuit configured to receive the analog input (102) and produce a digital bit- stream (140) associated therewith, the delta-sigma analog-...
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WO/2008/071791A1 |
A method and apparatus taught herein provide a digital-to-analog converter (DAC) for use in a conversion feedback path of a sigma-delta type analog-to-digital converter (ADC). The DAC uses current pulse shaping to generate a conversion f...
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WO/2008/068094A1 |
The invention relates to a bandpass sigma-delta analogue/digital converter (1) with a first and second bandpass filter (2, 3) connected in cascades and a quantizer (4) with feedback by means of D/A converters to the first and to the seco...
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WO/2008/052948A1 |
The present invention relates to a control device for a first closed-loop component, a second component in the feedback circuit to the loop input having a multiplicative noise. The invention also relates to a sigma-delta modulator for co...
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WO/2008/052949A1 |
The invention relates to a sigma-delta modulator for converting an analog signal into a digital signal using an analog-to-digital converter controlled in a closed loop. The undecided bits at the output of the analog-to-digital converter ...
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WO/2008/044725A1 |
Provided is a semiconductor device comprising an overflow detecting circuit (5) for comparing the output of at least one integrator of a ΔΣ-type modulator (13) with a predetermined value, to output an overflow detection signal, an over...
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WO/2008/043397A1 |
An analogue-to-digital converter apparatus (112) comprises a first integrator (202) coupled to a second integrator (204). The first and second integrators (202, 204) are coupled so as to provide a complex pole. The first integrator (202)...
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WO/2008/045713A2 |
A self-contained DAC that is especially suitable for use as an IP core, particularly for SOC (System on Chip) implementation. Techniques are applied to employ certain circuits (such as arithmetic element 302) to perform multiple function...
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WO/2008/036140A1 |
A method of operating a delta-sigma data converter includes receiving an input signal at an input of a delta-sigma modulator having a loop filter including a plurality of integrator stages, a quantizer for generating a quantized output c...
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WO/2008/033634A2 |
A delta-sigma modulator having predictive-controlled power consumption provides for reduced power consumption in analog-to-digital converters. The initial integrator stage of the delta-sigma modulator has a bias control input, which cont...
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WO/2008/033686A2 |
An analog-to-digital converter provides for reduced complexity and power consumption along with improved linearity. The analog-to-digital converter has a reduced number of quantizer output levels and includes a loop filter, a quantizer f...
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WO/2008/032046A2 |
A random number generator comprising a sigma-delta modulator, the sigma- delta modulator having a modulation unit comprising: a summation unit arranged to receive an analogue input signal that varies due to noise over a first voltage ran...
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WO/2008/033814A2 |
A feedback topology delta-sigma modulator having an AC-coupled feedback path reduces signal level in the loop filter, easing linearity requirements and reduces capacitor size requirements for the filter integration stages. The delta-sigm...
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WO/2008/028096A2 |
System and method (400) for common mode translation in continuous-time sigma- delta analog-to-digital converters (100). An embodiment comprises a loop filter having an RC network (105) coupled to a differential signal input, a Gm-C/Quant...
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WO/2008/023710A1 |
A continuous-time delta-sigma modulator has an SC(SCR) feedback DA (103) for improving the jitter tolerance of clocks (CLK). The delta-sigma modulator is not affected by any manufacture process variations, operational temperature conditi...
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WO/2008/022008A2 |
Improving signal-to-noise ratio (SNR) when using fewer bits than the number of output bits of an ADC as digital representation of the strength of the samples of an input signal (210). In an embodiment, an ADC generates digital values of ...
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WO/2008/014816A1 |
An asynchronous sigma delta digital to analog converter (100) for converting a digital input signal (u[k]) into an analog output signal (f(t)), the digital to analog converter (100) comprising an asynchronous sigma delta modulator (120) ...
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WO/2008/014246A1 |
An over-sampling analog-to-digital converter (ADC) uses a chopper stabilized voltage reference with improved reference voltage offset cancellation and reduced source induced 1/f noise. The chopper stabilized voltage reference receives ch...
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WO/2008/006337A1 |
The present invention relates to a method and a sensor arrangement for processing sensor signals, which are subject to an offset, from a sensor (6), which is operated in a plurality of measurement cycles with successive phases with diffe...
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WO/2007/144827A2 |
The invention relates to a method of digitizing a periodic analogue signal. The method comprises the step of providing a periodic sequence of time slots, wherein each time slot of the sequence of time slots has a configurable length, whe...
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WO/2007/144593A1 |
A sigma-delta modulator for forming a digital output signal representative of the magnitude of an analogue input signal, the modulator comprising a modulation unit comprising: a summation unit for summing the analogue input signal with a...
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WO/2007/145001A1 |
Each of plural sigma-delta modulators (M1, M2) having a sampling capacitor (CS11, CS12, CS21, CS22), an integrator (Amp1, Amp2), and a quantizer (Cmp1..Cmp5) are connected to each other in parallel. Each of the sigma-delta modulators con...
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WO/2007/120400A1 |
A sigma delta modulator (SDM) data converter system is provided. The SDM data converter system comprises a signal path, a feedback signal path, and a multi-bit quantizer disposed in a feedforward path. The signal path receives an input s...
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WO/2007/112190A2 |
The quantizers of delta sigma modulators in the signal processing systems described herein use a reduced set of comparators for quantization by predetermining and maintaining a maximum per cycle deviation d between a loop filter output s...
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WO/2007/112191A2 |
Quantizers of delta sigma modulators include comparators to quantize a quantizer input signal. Each comparator compares a respective reference signal to the quantizer input signal. A logic processing module determines a quantizer output ...
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WO/2007/106931A1 |
A wireless communications device (124) including a first antenna (138) and oscillator means (140) for providing a carrier signal (1.10). There is further provided modulation means (142) for imposing a low level phase modulation on the ca...
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WO/2007/107188A1 |
An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter (ADC) (230) in a forward path and a digital-to-analog converter (DAC) (265) in a feedback path such...
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WO2007086924B1 |
A self-tuning filter that is well suited for use as a output digital filter in a direct conversion delta-sigma transmitter is constructed as a high pass finite impulse response filter (18) having a cutoff frequency of twice the desired c...
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WO/2007/095475A1 |
A multiple analog signal converter (100) simultaneously converts multiple analog signals (104,106) to digital signals (112, 114) using a single analog to digital converter (ADC) 102. A first analog signal (104) at a first center frequenc...
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WO/2007/094255A1 |
A D/A converter (100) comprises a delta-sigma modulating circuit (102) including a quantizer (105) that receives a digital signal to quantize it based on a quantizing reference value; a local D/A converting circuit (107) for converting a...
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WO/2007/092878A2 |
An analog to digital processor for time bounded signals. The present invention provides a processor that is capable of processing time bounded signals through a delta sigma modulator. The present invention provides a gate or premodulator...
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WO/2007/089640A2 |
A two phase, second order capacitance-to-digital (CD) modulator includes a first stage sigma-delta integrator that forms charge packets as a function of sensor capacitance during an auto-zero phase and integrates the packets during an in...
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WO/2007/089568A2 |
A pressure transmitter having a capacitance-to-digital modulator produces an output as a function of a ratio sensor capacitance and a reference capacitance. Transmitter also includes a sensor failure mode detector produces an output sign...
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WO/2007/089574A2 |
A capacitance-to-digital (CD) modulator converts capacitance of a differential pressure sensor to a pulse code modulation output signal. The first stage of the CD modulator is a sigma-delta integrator having an auto-zero capacitor connec...
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WO/2007/085997A1 |
A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) comprising at least one combiner (Cl) for combining analog signals to convert with feedback analog signals, at least two integrators (Hl, H5),...
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WO/2007/084894A2 |
Systems and methods implemented in a multi-bit digital noise shaper for reducing or eliminating undesirable transient response when the noise shaper exits a clipping state. In one embodiment, die noise shaper includes a quantizer, a filt...
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WO/2007/082237A1 |
Techniques for performing ∑Δ modulation with offset in order to reduce out-of-band quantization noise are described. In an exemplary oversampling DAC that implements ∑Δ modulation with offset, an interpolation filter performs upsam...
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WO/2007/080715A1 |
A digital reception device includes a band pass type delta sigma A/D converter for performing analog-digital conversion for converting a signal to be modulated in an analog region into a signal in the digital region. It is possible to re...
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WO/2007/079838A1 |
This invention relates to adjusting a filter (110; 112) of a time-continuous Sigma-Delta converter (100) arranged to convert an analog input signal (Sin) to a digital output signal (Sout). A control signal (Sdet) indicative of a gain of ...
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WO/2007/079362A1 |
A signal processing system includes an analog-to-digital delta sigma modulator (300) with a duty cycle modulator (315) and a finite impulse response (FIR) filter (318) in a main loop (304) feedback path of the delta sigma modulator. The ...
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WO/2007/079097A2 |
A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first...
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WO/2007/071368A1 |
The invention relates to adjusting an input signal level of a Sigma-Delta converter (1020). A control signal (SAGC,control) indicative of an input signal level to said Sigma-Delta converter (1020) is generated, and the input signal level...
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WO/2007/069178A2 |
A radio-frequency ΣΔ-modulator comprises a first mixer in the forward path for down-converting the signals in this forward path with a local oscillator frequency and a second mixer in the feedback path for up-converting the feedback si...
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WO/2007/068688A1 |
The invention relates to analogue integrated electronic circuits using differential pairs (T1, T2). An automatic method of correcting offset voltage is proposed, comprising the following steps: short-circuiting the inputs (V1, V2) of the...
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WO/2007/066431A1 |
A high precision ΔΣ modulator is provided to reduce non-linear noise caused by the usage of a multiple-bit DAC, hardware quantity and power consumption. In the modulator, since a subtracting circuit is supplied with analog signals, dig...
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WO/2007/067850A1 |
A consecutive edge modulation (CEM) method and apparatus provides a pulse output that advantageously exploits the full edge update rate of the CEM while providing substantially centered pulses. The method and apparatus also operate witho...
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WO/2007/066273A2 |
The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to co...
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WO/2007/067849A2 |
A consecutive edge modulation (CEM) method and apparatus provides improved dynamic range in a noise-shaped CEM pulse generator. A limiting circuit is provided to adjust the rising and trailing edge pulse portion widths to correct conditi...
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WO/2007/066275A1 |
An analog-to-digital converter (ADCl) of the Sigma Delta type provides a stream of digital output samples (OUT) in response to an analog input signal (IN). The analog-to-digital converter (ADCl) comprises a quantizer (QNT) that has a dea...
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