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Matches 1 - 50 out of 5,459

Document Document Title
WO/2021/078960A1
The present invention relates to a sigma-delta analogue-to-digital converter. The sigma-delta analogue-to-digital converter has a transconductance stage having a first, second and third connection. A capacitor is parallel-connected to th...  
WO/2021/080721A1
In certain aspects, an analog-to-digital converter includes a first capacitive digitalto- analog converter (DAC), a second capacitive DAC, and a comparator including a first input, a second input, and an output. The analog-to-digital con...  
WO/2021/076254A1
A noise-shaping enhanced (NSE) gated ring oscillator (GRO)-based ADC includes a delay which delays and feedbacks an error signal to an input of the NSE GRO-based ADC. The feedback error signal provides an order of noise-shaping and the e...  
WO/2016/043592A8
A phase-domain delta-sigma (ΔΣ) modulator in a phase digitizer determines a demodulated phase error based on a phase-modulated frequency signal, in which a carrier frequency is modulated with a fundamental frequency and an associated p...  
WO/2021/063874A1
A differential delta-sigma-modulator has an integrator (49) including a pair of single-ended amplifiers (46, 47). The differential delta-sigma-modulator comprises a sample clock (50) driving a first switchable capacitor configuration (31...  
WO/2021/066888A1
A delta-sigma modulator (DSM) with non-recursive computation of delta- sigma residues comprising: an input port for receiving a digital input signal; a residue calculation circuit coupled to the input port for calculating delta-sigma res...  
WO/2021/061885A1
Systems and methods are provided for increasing efficiency of excess loop delay compensation in delta-sigma analog-to-digital converters. In some examples, systems and methods are provided for reducing total capacitance in an embedded ex...  
WO/2021/058617A1
Systems and methods are provided for architectures for an analog feedback class D modulator that increase the power efficiency of the class D modulator. In particular, systems and methods are provided for an analog feedback class D modul...  
WO/2021/053332A1
An apparatus (7) for down-converting a sampled signal comprises a processing system (206) configured to apply a mixing-and-combining operation repeatedly to successive sub-sequences of N input samples, X, representative of a signal and h...  
WO/2021/032837A1
A current to digital converter circuit has an integrator amplifier (IAmp) with an input (12) adapted to receive a current signal (Ip) and an output (13) adapted to provide a voltage signal (Vout) as a function of an integration of the cu...  
WO/2020/242906A1
An analog to digital converter (ADC) includes voltage and reference input terminals, a buffer circuit, and control logic. The buffer circuit includes input and output terminals and a variable resistor including resistive branches connect...  
WO/2020/242908A1
An analog to digital converter (ADC) circuit includes voltage and reference input terminals, a sample circuit, and control logic. The sample circuit includes input and output terminals, and capacitors connected in parallel and arranged b...  
WO/2020/241102A1
This analog-digital conversion device is provided with: a variable gain amplifier which amplifies an inputted analog signal; a digital-analog converter which converts the analog signal that has passed through the variable gain amplifier ...  
WO/2020/223467A1
Video coding and decoding methods are described. In example method includes performing a conversion between a current video block of a video and a bitstream representation of the current video block by determining a first intra coding mo...  
WO/2020/204819A3
This document describes a differential phase quantizer comprising an edge collision handler module and a bi-directional counter. In particular, the edge collision handler is configured to detect and remove collided edges from positive an...  
WO/2020/195535A1
The purpose of the present disclosure is to provide a digital filter, an AD converter, a sensor processing circuit, and a sensor system which can achieve both high precision and low latency of output data. A digital filter (3) is used in...  
WO/2020/198111A1
A circuit (100) includes a programmable gain amplifier (PGA, 102) having a PGA output. The circuit (100) further includes a delta-sigma modulator (104) having an input coupled to the PGA output. The circuit (100) also includes a digital ...  
WO/2020/195534A1
The objective of the present invention is to provide an AD converter, a sensor processing circuit, and a sensor system with which it is possible to achieve both an increase in resolution and a reduction in latency simultaneously. An AD c...  
WO/2020/195754A1
Provided are an analog-to-digital (AD) converter, a sensor processing circuit, and a sensor system which can improve responsiveness of feedback control. An AD converter (1) is provided with an input unit (3), an AD conversion unit (2), a...  
WO/2020/181485A1
Provided is an analog-to-digital converter (10). The analog-to-digital converter has an analog-to-digital conversion operating mode and a measurement operating mode. The analog-to-digital converter comprises an input end (100), a digital...  
WO/2020/182340A1
A drive having an electric motor able to be fed by an inverter, wherein the electric motor is connected to the AC-voltage-side terminal of the inverter by way of feed lines, wherein current sensors for recording the current in one of the...  
WO/2020/180541A1
Methods and devices to mitigate time varying impairments in sensors are described. The application of such methods and devices to pressure sensors facing time varying parasitic capacitances due to water droplets is detailed. Benefits of ...  
WO/2020/173656A1
An ADC system comprises a coarse ADC for determining a coarse word (CW) representing an input signal, and an incremental ADC (IADC) for determining a fine word (FW) based on a combination of the input signal and a feedback signal. A firs...  
WO/2020/173558A1
An ADC circuit (50) is disclosed. It comprises a global input configured to receive an input voltage (Vin) and a plurality of converter circuits (105l-105N). Each converter circuit (105j) comprises a comparator circuit (70j) having a fir...  
WO/2020/175581A1
The present invention is provided with: a subtractor 1 that calculates the difference between an input digital signal and a feedback signal; an integrator 2 that integrates this difference; a quantizer 3 that quantizes an integrated valu...  
WO/2020/135958A1
A method of processing an analog signal includes receiving, into a signal processing circuity, an analog signal from a sensor, the signal processing circuitry having an offset voltage. The method includes receiving, into the signal proce...  
WO/2020/123363A1
Herein disclosed are some examples of metastability detectors and compensator circuitry for successive-approximation-register (SAR) analog-to-digital converters (ADCs) within delta sigma modulator (DSM) loops. A metastability detector ma...  
WO/2020/115065A1
The invention relates to a circuit arrangement for an incremental delta-sigma modulator, the circuit arrangement comprising at least one incremental delta-sigma modulator and a sample-and-hold element, wherein the sample-and-hold element...  
WO/2020/112291A1
Examples relate to a conversion circuitry, a means for converting, a conversion method, a Delta-Sigma-modulator, a Delta-Sigma-modulation means, a digital to analog conversion circuit, a digital to analog conversion means, a mobile devic...  
WO/2020/109320A1
A sigma-delta analog-to-digital converter comprises first and second injection branches (101, 102) and first and second feedback branches (121, 122) connected to an integration node (120). The first and second injection branches are conf...  
WO/2020/110558A1
This variation suppressing circuit suppresses variations in a reference voltage supplied to a switched capacitor circuit (2, 42, 52) of a differential configuration. The switched capacitor circuit has a configuration in which an input ca...  
WO/2020/072139A1
A continuous time sigma delta modulator for use in a continuous time sigma delta analog to digital converter is described. The modulator comprises a sequence of integration stages and a quantizer arranged to receive an output from the la...  
WO/2020/054830A1
The present invention mitigates instability in internal state upon sharp change in input in a current input delta-sigma modulator. A signal current is input to a first integrating node. A differential current between a fixed current and ...  
WO/2020/050927A1
A radio frequency system. In some embodiments, the system includes a one- bit receiver, and the one-bit receiver includes a digital pseudo random noise generator, a one-bit digital to analog converter, a power combiner, a one-bit analog ...  
WO/2020/050937A1
An active filter and an analog-to-digital converter (ADC) configured to suppress out-of-band peaking. An active filter may include an active device configured to provide a power gain to an input signal, a feedback network configured to c...  
WO/2020/040068A1
A sound processing device (100) is provided with: a correction unit (112) that, on the basis of asymmetry of a waveform in one carrier frequency when a predetermined input signal is converted to a pulse width modulation (PWM) signal, cor...  
WO/2020/039506A1
A communication apparatus (50) includes a path splitting unit configured to split an existing path into two paths, with one path being formed by appending 1 to the existing path and, the other path being formed by appending -1 to the exi...  
WO/2020/037506A1
Embodiments of the present application relate to continuously variable slope delta modulation (CVSD)-based encoding and decoding methods and devices. The method comprises: if a+1 encoded values corresponding to (n-a)th to nth signals in ...  
WO/2020/038559A1
The invention relates to an analog-to-digital converter (ADC). The objective of the invention to have an analog-to- digital converter with the capability of non-equidistant sample time spacing and minimizing energy consumption will be so...  
WO/2020/038565A1
The invention relates to an interface between a radio receiver on a RF-side and a baseband receiver on a BB-side whereas the radio receiver comprises means for receiving radio frequency signals and an analog-to-digital converter for conv...  
WO/2020/036754A1
A signal acquisition or conditioning amplifier can be configured and controlled to use correlated doubling sampling (CDS) of a differential input signal, and a storage capacitor in a capacitive or other feedback network, a low power oper...  
WO/2020/028083A1
In one embodiment, the present invention is directed to a contact hearing system comprising: an ear tip including a transmit coil, wherein the transmit coil is connected to an audio processor, including an H Bridge circuit; a first input...  
WO/2019/217088A4
Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-si...  
WO/2020/003745A1
This audio device is provided with: a first path in which digital-sigma modulation is applied to a sound source signal or a signal generated on the basis of the sound source signal; a second path in which digital-sigma modulation is not ...  
WO/2019/229678A1
Circuitry and techniques are described herein for performing accurate and low power conversion of an analog value into a digital value. According to some aspects, this disclosure describes a successive approximation register (SAR) analog...  
WO/2019/228700A1
A sensor arrangement (10) comprises a pressure sensor (12) that is realized as capacitive pressure sensor, a capacitance-to-digital converter (13) coupled to the pressure sensor(12) and implemented as a delta-sigma analog-to- digital con...  
WO/2019/231857A1
An example sigma delta modulator (SDM) circuit includes a floor circuit (306), a subtractor (308) having a first input coupled an input of the floor circuit and a second input coupled to an output of the floor circuit, and a multi-stage ...  
WO/2019/217088A1
Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-si...  
WO/2019/217087A1
Various embodiments relate to delta-sigma loop filters with input feedforward. A delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator. The delta-sigma loop fi...  
WO/2019/215095A1
A Class-D amplifier for generating a driver signal from a multi-bit input signal comprises a digital pulse-width modulation (PWM), stage (DPWM) that is configured to generate a PWM signal (PWMA, PWMB) from the multi-bit input signal and ...  

Matches 1 - 50 out of 5,459