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Title:
基板、特に光学、電子工学または電子光学用基板の製造方法、およびこの製造方法により得られる基板
Document Type and Number:
Japanese Patent JP2004519093
Kind Code:
A
Abstract:
A semiconductor substrate that includes a relatively thin monocrystalline useful layer, an intermediate layer transferred from a source substrate, and a relatively thick layer of a support present on one of the useful layer of the intermediate layer. The support is made of a deposited material that has a lower quality than that of one or both of the intermediate and useful layers. A bonding layer may be included on one of the intermediate layer or the useful layer, or both, to facilitate bonding of the layers an a thin layer may be provided between the useful layer and intermediate layer. These final substrates are useful in optic, electronic, or optoelectronic applications.

Inventors:
Gislan, Bruno
Fabrice, L'Etour
Application Number:
JP2002544770A
Publication Date:
June 24, 2004
Filing Date:
November 26, 2001
Export Citation:
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Assignee:
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
International Classes:
H01L27/12; H01L21/02; H01L21/762; H01L29/165; H01L29/267; H01L29/20; H01L29/24; (IPC1-7): H01L27/12
Domestic Patent References:
JPH04262576A1992-09-17
JPH09115832A1997-05-02
JPH05101998A1993-04-23
JPH11312811A1999-11-09
JPH07302889A1995-11-14
JPH1126733A1999-01-29
JPH10200080A1998-07-31
JPH11135882A1999-05-21
JPH0536951A1993-02-12
JPH10233352A1998-09-02
JPH11195775A1999-07-21
JPH08213645A1996-08-20
JPS61294846A1986-12-25
Foreign References:
WO1999041776A11999-08-19
WO1998052216A11998-11-19
WO1999039371A21999-08-05
FR2787919A12000-06-30
US6114188A2000-09-05
Attorney, Agent or Firm:
Keiichi Ota