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Patent Searching and Data


Title:
低温プラズマによるMEMS用途向けシリコン(Si)又はシリコンゲルマニウム(SiGe)
Document Type and Number:
Japanese Patent JP2005534510
Kind Code:
A
Abstract:
A method is provided for making a MEMS structure (69). In accordance with the method, a CMOS substrate (51) is provided which has interconnect metal (53) deposited thereon. A MEMS structure is created on the substrate through the plasma assisted chemical vapor deposition (PACVD) of a material selected from the group consisting of silicon and silicon-germanium alloys. The low deposition temperatures attendant to the use of PACVD allow these materials to be used for MEMS fabrication at the back end of an integrated CMOS process.

Inventors:
Forcener, Jewelgen A.
Smith, Stephen M.
Loop, Raymond Marvin
Application Number:
JP2004525975A
Publication Date:
November 17, 2005
Filing Date:
May 13, 2003
Export Citation:
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Assignee:
Freescale Semiconductor, Inc.
International Classes:
B81B3/00; B81B7/02; B81C1/00; H01H49/00; H01H59/00; (IPC1-7): B81C1/00; H01H49/00; H01H59/00
Attorney, Agent or Firm:
Mamoru Kuwagaki