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Title:
制御された導電性構造体のギャップの製造法
Document Type and Number:
Japanese Patent JP2006523144
Kind Code:
A
Abstract:
A method for controlling a gap in an electrically conducting solid state structure provided with a gap. The structure is exposed to a fabrication process environment conditions of which are selected to alter an extent of the gap. During exposure of the structure to the process environment, a voltage bias is applied across the gap. Electron tunneling current across the gap is measured during the process environment exposure and the process environment is controlled during process environment exposure based on tunneling current measurement. A method for controlling the gap between electrically conducting electrodes provided on a support structure. Each electrode has an electrode tip separated from other electrode tips by a gap. The electrodes are exposed to a flux of ions causing transport of material of the electrodes to corresponding electrode tips, locally adding material of the electrodes to electrode tips in the gap.

Inventors:
Gorovchenko Jane A.
Surman Gregor M.
King Gavin M.
Brunton Daniel
Application Number:
JP2006503137A
Publication Date:
October 12, 2006
Filing Date:
January 29, 2004
Export Citation:
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Assignee:
President and Fellows of Harvard College
International Classes:
B82B3/00; B81B1/00; B81C99/00; G01N13/12; H01L21/66; H01L
Domestic Patent References:
JP2003502166A2003-01-21
Foreign References:
Other References:
JPN6009046879, C.Z.Li, et.al., "Quantized tunneling current in the metallic nanogaps formed by electrodeposiiton and echning", APPLIED PHYSICS LETTERS, 20001211, Vol.77, No.24, p.3995−3997
JPN6009046880, Sven−Bertil Carlsson, et.al., "Mechanical tuning of tunnel gaps for the assembly of single−electron transistors", APPLIED PHYSICS LETTERS, 19990906, Vol.75, No.10, p.1461−1463
Attorney, Agent or Firm:
Shimizu Hatsushi
Koichi Niimi