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Title:
【発明の名称】データインテグリティを保証する通信システム
Document Type and Number:
Japanese Patent JP2864741
Kind Code:
B2
Abstract:
The main storage (120), the communication interface portion (130) and the circuit control module (160) hold transmission data in the buffers until completion of the transmission has been confirmed. When a fault has occurred in the current operating system (130, 150) of the duplexed portions in the configuration elements of the host computer (100) and the multi-circuit control unit (140), the duplexed portions are changed over from the current operating system (130, 150) to the stand-by system (230, 250). In this case, information for reproducing data that has been lost due to the change-over is transmitted from the main storage (120) and the circuit control module (160) to the communication interface portion which has become the new current operating system. The communication interface portion (130) which has become the new current operating system restarts the processing based on this information. Data integrity is guaranteed for the data of both directions of transmission and receiving between the host computer (100) and to terminal (290) without mutually confirming the state of data communications before the occurrence of the fault between the terminal (290) and the host computer (100) after the occurrence of the fault. Information exchanges of layer 3 or above are not carried out between the host computer (100) and the terminal (290). Therefore, overhead of data communications can be minimized.

Inventors:
TADAMURA KATSUMI
OKADA MASAKAZU
YAMAGUCHI SHOJI
Application Number:
JP40374390A
Publication Date:
March 08, 1999
Filing Date:
December 19, 1990
Export Citation:
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Assignee:
HITACHI SEISAKUSHO KK
International Classes:
H04L1/22; G06F11/14; G06F11/20; H04L29/10; H04L29/14; (IPC1-7): H04L1/22; H04L29/14
Attorney, Agent or Firm:
小川 勝男