Title:
【発明の名称】自営用PHS親機システムにおけるISDN網とのクロック同期補正方法および回路
Document Type and Number:
Japanese Patent JP2912347
Kind Code:
B1
Abstract:
This invention intends to provide a correction method for synchronization between an air side and a network side of a PHS cell station. The correction method and apparatus enables a continued conversation without losing a PHS personal station with which a PHS cell station is communicating when the cell station is connected to an ISDN network. To achieve this object, the correction is executed not until after the synchronization between the air side and the network side. The divider circuit for air and a divider circuit for synchronization change a dividing ratio depending on a phase difference signal. The divider circuit for air always operates regardless of the connection to the ISDN network. A phase lock loop circuit of the invention accepts an input from two divider circuits. The synchronization process is not started until a connection between the ISDN network and the personal station is assured.
Inventors:
Tsunefumi Kasuya
Application Number:
JP11878998A
Publication Date:
June 28, 1999
Filing Date:
April 28, 1998
Export Citation:
Assignee:
NEC IC Microcomputer System Co., Ltd.
International Classes:
H03L7/06; H04J3/06; H04L7/00; (IPC1-7): H04L7/00; H03L7/06; H04M1/00; H04Q7/38
Domestic Patent References:
| JP10145867A |
Attorney, Agent or Firm:
Tadashi Wakabayashi (4 others)