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Title:
半導体処理装置
Document Type and Number:
Japanese Patent JP3066507
Kind Code:
B2
Abstract:
Semiconductor processing system for forming a conductive metal film on a semiconductor wafer surface by a sputtering technique, wherein the metal film is to be subsequently patterned into a wiring pattern. The semiconductor processing system includes a support structure for the semiconductor wafer, a fastening device for securing the support structure, and a shielding member which shields the greater part of the area of the support structure and the fastening device for preventing the metal particles being sputtered onto the semiconductor wafer surface from adhering to areas other than the semiconductor wafer surface. The shielding member which may be a shielding plate includes an integral supplementary shielding member in the form of a cylindrical shield defining its system periphery to protect other areas of processing system components from the sputtered metal particles. This system substantially reduces the incidence of metal particles separating from outside unshielded areas of processing system components and thereafter adhering to the semiconductor wafer as the semiconductor wafer is being moved during different stages of the sputtering process which would otherwise result in the contamination of the patterned wiring pattern by such separated metal particles causing defects therein.

Inventors:
竹内 芳司
高橋 信行
Application Number:
JP33912590A
Publication Date:
July 17, 2000
Filing Date:
November 30, 1990
Export Citation:
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Assignee:
日本テキサス・インスツルメンツ株式会社
International Classes:
C23C14/00; C23C14/34; C23C14/50; C23C14/56; H01J37/34; H01L21/285; (IPC1-7): C23C14/50; C23C14/00; H01L21/285
Attorney, Agent or Firm:
佐々木 聖孝 (外1名)



 
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