Title:
【発明の名称】半導体装置の検査方法、装置および製造方法
Document Type and Number:
Japanese Patent JP3094448
Kind Code:
B2
Abstract:
In the inspection of a semiconductor device having internal elements including MISFETs, especially complementary MISFETs, whether the semiconductor device is good or defective is judged by static currents flowing through the device in a state that the internal elements are fixed. A stuck-at fault, a fault sensed using conventional fault-simulation of MISFETs, etc., and further a fault relative to the reliability in a long term can be sensed jointly by using a group of patterns which controls the states of the nodes of the internal elements or ON-OFF states of the MISFETs constituting the internal elements as a group of test patterns for the inspection. In the inspection according to the static currents, because of no necessity of considering the observability of faults at an output terminal, the number of the test patterns used for the inspection is small, and the creation thereof is easy too.
Inventors:
Yoshikazu Ohshima
Toshio Shimizu
Katsuya Iida
Fumiaki Kumazawa
Toshio Shimizu
Katsuya Iida
Fumiaki Kumazawa
Application Number:
JP51285491A
Publication Date:
October 03, 2000
Filing Date:
July 19, 1991
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G01R31/28; G01R31/30; G06F11/22; H01L21/66; (IPC1-7): G01R31/28; H01L21/66
Domestic Patent References:
| JP1114770A | ||||
| JP6183976A | ||||
| JP63205581A |
Attorney, Agent or Firm:
Minoru Yamada