Title:
配線基板、配線材料、及び銅張積層板、及び配線基板の製造方法
Document Type and Number:
Japanese Patent JP4529978
Kind Code:
B2
Abstract:
A wiring substrate of the invention comprises electrical insulation substrate (1), through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.
Inventors:
Hideki Azumaya
Application Number:
JP2006547643A
Publication Date:
August 25, 2010
Filing Date:
July 07, 2006
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H05K1/11; H05K3/38; H05K3/40; H05K3/46
Domestic Patent References:
| JP2005101398A | 2005-04-14 | |||
| JP2001102754A | 2001-04-13 | |||
| JP2001308534A | 2001-11-02 | |||
| JP2001345528A | 2001-12-14 | |||
| JP2003008161A | 2003-01-10 | |||
| JP2004281621A | 2004-10-07 | |||
| JP2000068620A | 2000-03-03 |
Attorney, Agent or Firm:
Hiroki Naito
Daisuke Nagano
Kentaro Fujii
Daisuke Nagano
Kentaro Fujii