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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5685020
Kind Code:
B2
Abstract:
A method for fabricating a semiconductor device including: forming a silicon layer on an upper face of a nitride semiconductor layer including a channel layer of a FET; thermally treating the nitride semiconductor layer in the process of forming the silicon layer or after the process of forming the silicon layer; and forming an insulating layer on an upper face of the silicon layer after the process of forming the silicon layer.

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Inventors:
荒谷 毅
駒谷 務
Application Number:
JP2010166321A
Publication Date:
March 18, 2015
Filing Date:
July 23, 2010
Export Citation:
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Assignee:
住友電気工業株式会社
住友電工デバイス・イノベーション株式会社
International Classes:
H01L21/338; H01L21/28; H01L29/778; H01L29/812
Attorney, Agent or Firm:
Shuhei Katayama



 
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