Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
推定される作業負荷並列性に基づき中央処理装置電力を制御するためのシステムおよび方法
Document Type and Number:
Japanese Patent JP5893568
Kind Code:
B2
Abstract:
A method of dynamically controlling power within a multicore CPU is disclosed and may include receiving a degree of parallelism in a workload of a zeroth core and determining whether the degree of parallelism in the workload of the zeroth core is equal to a first wake condition. Further, the method may include determining a time duration for which the first wake condition is met when the degree of parallelism in the workload of the zeroth core is equal to the first wake condition and determining whether the time duration is equal to a first confirm wake condition. The method may also include invoking an operating system to power up a first core when the time duration is equal to the first confirm wake condition.

Inventors:
Boffslav Lychric
Robert A. Glen
Ali Iranli
Brian J. Salsbury
Schmidt Sur
Stephen S. Thomson
Application Number:
JP2012544561A
Publication Date:
March 23, 2016
Filing Date:
November 24, 2010
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
Qualcomm, Inc.
International Classes:
G06F9/50
Domestic Patent References:
JP86681A
JP2008513912A
JP11143839A
JP2006268166A
JP2008129846A
Foreign References:
Attorney, Agent or Firm:
Murayama Yasuhiko
Kuroda Shinpei



 
Previous Patent: 医療用ポンプシステム

Next Patent: JPS5893569