Title:
電力用半導体装置の製造方法および電力用半導体装置
Document Type and Number:
Japanese Patent JP6433590
Kind Code:
B2
Abstract:
An object of the invention is to provide: a manufacturing method for a highly reliable power semiconductor device which prevents breakage of an conductor pattern and an insulating layer, and has bonding strength higher than that by the conventional bonding between the electrode terminal and the conductor pattern; and that power semiconductor device. Breakage of the conductor pattern and the insulating layer is prevented due to inclusion of: a step of laying an electrode terminal on a protrusion provided on a conductor pattern placed on a circuit-face side of a ceramic board so that a center portion of a surface to be bonded of the electrode terminal makes contact with a head portion of the protrusion; a step of pressurizing and ultrasonically vibrating a surface opposite to the surface to be bonded, of the electrode terminal, using an ultrasonic horn, to thereby bond the electrode terminal to the conductor pattern.
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Inventors:
Hiroshi Yoneda
Junji Fujino
Kaoru Shige
Youichi Hironaka
Junji Fujino
Kaoru Shige
Youichi Hironaka
Application Number:
JP2017523590A
Publication Date:
December 05, 2018
Filing Date:
May 31, 2016
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/60; H01L25/07; H01L25/18
Domestic Patent References:
| JP2003045920A | ||||
| JP2010212645A | ||||
| JP2015046416A | ||||
| JP2014056917A |
Attorney, Agent or Firm:
Masuo Oiwa
Takenaka Ikuo
Keigo Murakami
Kenji Yoshizawa
Takenaka Ikuo
Keigo Murakami
Kenji Yoshizawa