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Title:
アナログ/デジタル変換回路及び無線通信機
Document Type and Number:
Japanese Patent JP6746546
Kind Code:
B2
Abstract:
According to one embodiment, an analog-to-digital converter includes a first digital-to-analog converter, a comparator configured to digitally output based on a first clock signal, a clock generator configured to generate the first clock signal from an input clock signal, and a controller configured to control the first digital-to-analog converter. The clock generator sets a cycle of the first clock signal to a first cycle if the input clock signal is at a first logic level, and sets the cycle of the first clock signal to a second cycle shorter than the first cycle if the input clock signal is at a second logic level.

Inventors:
Daisuke Kurose
Application Number:
JP2017170255A
Publication Date:
August 26, 2020
Filing Date:
September 05, 2017
Export Citation:
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Assignee:
Toshiba Corporation
Toshiba Electronic Devices & Storage Corporation
International Classes:
H03M1/38
Domestic Patent References:
JP201692590A
JP201533123A
JP201239475A
JP2011211371A
JP61242420A
Attorney, Agent or Firm:
Kurata Masatoshi
Nobuhisa Nogawa
Takashi Mine
Naoki Kono
Ukai Ken