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Title:
情報処理装置、情報処理装置の制御方法及びプログラム
Document Type and Number:
Japanese Patent JP7042837
Kind Code:
B2
Abstract:
An information processing device (1) includes: a decoding circuit (12b), provided on a data bus (DB) for connecting a main memory (101) and an external storage device (11), which is capable of switching between enabling and disabling a process for decoding information that is transmitted through the data bus (DB); and a CPU (100) that is configured to read out information written in the external storage device (11) into the main memory (101). The CPU (100) is configured to enable the decoding process of the decoding circuit 12b in a case where a snapshot image of the main memory 101 is read out as the information written in the external storage device (11).

Inventors:
Gumi Shigetoshi
Nakamoto Daido
Hiroyuki Nakayama
Application Number:
JP2019550058A
Publication Date:
March 28, 2022
Filing Date:
October 31, 2017
Export Citation:
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Assignee:
Mitsubishi Heavy Industries Machinery Systems Co., Ltd.
International Classes:
G06F9/4401; G06F21/62
Domestic Patent References:
JP59173847A
JP61051251A
JP2008204459A
JP2008299611A
JP2010113615A
JP2013005314A
JP2013507715A
Foreign References:
US20050044433
Other References:
鈴木朋夫、株式会社ウチダ人材開発センタ,Get!CompTIA Security+ セキュリティ社会の必修科目(試験番号:SY0-401),初版,日本,株式会社ウチダ人材開発センタ,2015年10月01日,p.44-45,ISBN978-4-7981-4180-0
Attorney, Agent or Firm:
Yasushi Matsunuma
Eisuke Ito
Hiroyuki Hashimoto
Ancient city Satoshi
Koichiro Kamada