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Patent Searching and Data


Title:
APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR
Document Type and Number:
Japanese Patent JP2008135440
Kind Code:
A
Abstract:

To provide a semiconductor manufacturing apparatus and a semiconductor manufacturing method capable of suppressing the generation of a sublimate from a coating film without reducing throughput and capable of restraining deterioration in the yield of a semiconductor device caused by the occurrence of dust.

There are provided: a bake chamber 2 for baking a substrate 1 on which the coating film is formed at prescribed temperature; a cooling chamber 3 for cooling the baked substrate 1; and a first conveyance mechanism 31 for conveying the baked substrate 1 from the bake chamber 2 to the cooling one 3. The cooing chamber 3 has a second conveyance mechanism 35 for conveying the substrate 1 conveyed to the cooling chamber 3 in the cooling chamber 3, and temperature control mechanisms 34a, 34b, 34c, 34d, 34e, 34f for lowering temperature to room temperature in a conveyance direction.


Inventors:
KUDO TOMOYASU
Application Number:
JP2006318385A
Publication Date:
June 12, 2008
Filing Date:
November 27, 2006
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/027; B05C9/14; B05C13/02; B05D3/00
Attorney, Agent or Firm:
Amagi International Patent Office