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Patent Searching and Data


Title:
AUTOMATIC REGULATING CIRCUIT FOR OFFSET
Document Type and Number:
Japanese Patent JPH0526909
Kind Code:
A
Abstract:

PURPOSE: To regulate automatically the offset of an A/D conversion circuit.

CONSTITUTION: A sampling circuit 6 for sampling an input signal, a low-pass filter 7 for removing a sampling frequency component contained in the sampled input signal and an A/D conversion circuit 3 subjecting an output of the low-pass filter 7 to A/D conversion are provided. A construction is so made that an offset error is determined by integrating a digital signal obtained from the A/D conversion for one period and by dividing it at a sampling rate for one period and that the input signal is corrected on the basis of the offset error obtained.


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Inventors:
NOMA MOTONOBU
Application Number:
JP18614491A
Publication Date:
February 05, 1993
Filing Date:
July 25, 1991
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G01R19/00; H03M1/10; (IPC1-7): G01R19/00; H03M1/10
Attorney, Agent or Firm:
Mamoru Takada (1 person outside)