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Title:
BUFFER MEMORY CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH05342099
Kind Code:
A
Abstract:

PURPOSE: To enable more efficient exclusive buffer memory control and to improve the performance by suppressing unwanted invalidizing operations.

CONSTITUTION: In an information processing system provided with processors 1 and 1, storage device and plural buffer memories in a store-in system for storing the copy of one part of the storage device, each registration entry of a data block to be registered on the buffer memories 2 and 2' is provided with the attributes of an exclusive type as shown by (a) shared type as shown by (b) and single type as shown by (c) so as to enable only the fetching of data and to show the existence of the data block only in the single buffer memory 2. Since the single type attribute is provided as the registration attributes of the buffer memories 2 and 2', the existent state of only one data block requested to be stored between the buffer memories can be more exactly judged, and the unwanted invalidizing operations can be eliminated.


Inventors:
SAKURAI HITOSHI
AOKI NAOZUMI
Application Number:
JP1992000153497
Publication Date:
December 24, 1993
Filing Date:
June 12, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/08; (IPC1-7): G06F12/08
Attorney, Agent or Firm:
京谷 四郎



 
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