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Title:
CIRCUIT FOR CONTROLLING TRANSIENT DURING AUDIO DEVICE POWER-UP AND POWER-DOWN, AND SYSTEM USING THE SAME
Document Type and Number:
Japanese Patent JP2007243992
Kind Code:
A
Abstract:

To provide a circuit and a system for ramping a voltage across a load (506).

This circuit and the system include a charging circuit (500) for charging a capacitor (501) to generate a ramp-up waveform. A circuit (511) selectively decouples a first driver (510) from the load (506) during a ramp up mode and couples the first driver (510) to the load (506) during a normal operation mode. A ramp-up driver (507a) is selectively coupled to the load (506) during the ramp-up mode for ramping up the voltage across the load (506) in response to the ramp-up waveform generated by the charging circuit (500). A discharging circuit (503d, 514a, b) discharges the capacitor (501) to generate a power-down waveform. The circuit (511) selectively decouples the first driver (501) from the output load (506) during the ramp-down of the voltage across the output load (506).

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
WU XIAOMIN
WELSER JOSEPH JASON
SUBRAMANIAM KRISHNAN
Application Number:
JP2007154057A
Publication Date:
September 20, 2007
Filing Date:
June 11, 2007
Export Citation:
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Assignee:
CIRRUS LOGIC INC
International Classes:
H03K17/28; H04R3/00; H03F1/00; H03G3/34; H03K4/94
Attorney, Agent or Firm:
Hideto Asamura
Hajime Asamura
Hayashi Zouzo
Kuniaki Shimizu



 
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